Fix bitset of push_reg/pop_reg in MacroAssembler::call_native_base

Dingli Zhang dingli at iscas.ac.cn
Thu Apr 21 03:45:59 UTC 2022



> On Apr 21, 2022, at 11:14, jiangfeilong <jiangfeilong at huawei.com> wrote:
> 
> Hi Dingli,
> 
> Looks like it is a typo. Here we want to save t0 and xmethod (x5 and x31), which should be `0x80000020`.
> I will help create an issue and add you as the co-author in the pull request.
> 
> Thanks, Feilong
> 
> -----Original Message-----
> From: riscv-port-dev <riscv-port-dev-retn at openjdk.java.net> On Behalf Of Dingli Zhang
> Sent: Thursday, April 21, 2022 9:08 AM
> To: riscv-port-dev at openjdk.java.net
> Subject: Fix bitset of push_reg/pop_reg in MacroAssembler::call_native_base
> 
> Hi, I found a small problem in src/hotspot/cpu/riscv/macroAssembler_riscv.cpp:
> 
> void MacroAssembler::call_native_base(address entry_point, Label *retaddr) {
>  Label E, L;
>  int32_t offset = 0;
>  push_reg(0x80000040, sp);   // push << t0 & xmethod >> to sp
>  movptr_with_offset(t0, entry_point, offset);
>  jalr(x1, t0, offset);
>  if (retaddr != NULL) {
>    bind(*retaddr);
>  }
>  pop_reg(0x80000040, sp);   // pop << t0 & xmethod >> from sp
> }
> 
> Bitset of '0x80000040' operates << t1 & xmethod >> here, I think it should be '0x80000020' for << t0 & xmethod >>.
> 
> I pushed a small patch here: https://github.com/DingliZhang/jdk/commit/6a52ec04b0582b8f4219d6a3e9b7ab64e7a97de3
> 
> Best regards,
> Dingli

Hi Feilong,

Thanks for reply!
I will start tier1 test on developing board after your issue.

Best regards,
Dingli


More information about the riscv-port-dev mailing list