[riscv-port] RFR: 8280116: riscv: RVB: Add rest instructions of zba, zbb, and bitwise rotation

[Fei Yang]

On Tue, 18 Jan 2022 07:52:30 GMT, Feilong Jiang <fjiang at openjdk.org> wrote:

> This PR has the following changes:
> 1. Implement rest instructions of zba, zbb and bitwise rotation sub-extension
> 2. Add non-rvb version of AbsI/AbsL
> 
> Within this PR, zba, zbb and bitwise rotation of RISC-V Bit-Manipulation are fully supported in riscv-port. 
> 
> New C2 instructions are covered by the JTREG tests hotspot:tier1

Looks good. Thanks.

-------------

Marked as reviewed by fyang (Lead).

PR: https://git.openjdk.java.net/riscv-port/pull/47