RVC by default?

[Vladimir Kempik]

Hello
To be more specific, I saw slight perf decrease with RVC only on a core running on fpga.
On thead c910 results ( -RVC and + RVC) are on par.

Regards, Vladimir

> 8 сент. 2022 г., в 15:09, Xiaolin Zheng <yunyao.zxl at alibaba-inc.com> написал(а):
> 
> Hi Aleksey and Vladimir,
> 
> The current RVC support is okay but not complete: it only covers ~10% of total instructions emitted (mostly C2 code, including some part of Stub code), and we might want to transform instructions into the compressed counterparts as much as possible, so maybe the design will change from a whitelist mode (the class CompressibleRegion) to a black list mode. There is one implementation at my local branch https://github.com/zhengxiaolinX/jdk/commits/REBASE-rvc-beautify <https://github.com/zhengxiaolinX/jdk/commits/REBASE-rvc-beautify> (might not be stable yet, I have not gotten enough time to give it a sufficient test on jtregs and specjbb2015/other benchmarks yet). There are plans reserved to commit them (which cover ~20% of instructions under some tests) after reviewing, but this is currently WIP and waiting loom port to merge first.
> 
> And thank you Vladimir for your observations, I will test the Renaissance benchmark as you have mentioned. I have given tests for specjbb2015 months before and found slight performance increase there; as far as I know, the compile time will increase for the transformation logic is extra overhead during the instruction emission phase, such as the code in Assembler::add. Theoretically, when running the compiled code with RVC turning on, though IPC and CPI are not changed, the code size shrinks; I think it should have the same effect as the icache size becoming larger. Maybe something goes wrong? :-) I might need to look into the performance problem in a high priority, so will test the Renaissance first.
> 
> Best,
> Xiaolin
> 
> ------------------------------------------------------------------
> From:Aleksey Shipilev <shade at redhat.com>
> Send Time:2022年9月8日(星期四) 18:34
> To:undefined <undefined>; undefined <undefined>
> Subject:RVC by default?
> 
> Hi,
> 
> I was looking at some generated code on RISC-V, and realized while we have RVC support, we don't 
> enable it by default. On HiFive Unleashed:
> 
> $ test-jdk/bin/java -XX:+UnlockExperimentalVMOptions -XX:+PrintFlagsFinal 2>&1 | grep RVC
>       bool UseRVC                                   = false                           {ARCH 
> experimental} {default}
> 
> 
> Is there a reason not to do RVC by default? Can we reliably poll the RVC capabilities in current 
> hardware?
> 
> -- 
> Thanks,
> -Aleksey

-------------- next part --------------
An HTML attachment was scrubbed...
URL: <https://mail.openjdk.org/pipermail/riscv-port-dev/attachments/20220908/f2113ffb/attachment-0001.htm>