Re: RVC by default?

[Xiaolin Zheng]

Hi Vladimir,
There are some minor updates for the philosophers in Renaissance discussed days before: I have tested the philosophers on my Unmatched board, and found the test itself seems not stable, even if the JMH version. I gave its JMH version a two-day long run, exclusively, but the score varies in the 13000 ms/op range (iterations = 30 by default), even if RVC doesn't get turned on. Have you encountered the same issue?
+ /home/ubuntu/yunyao/jdk19-release/bin/java -XX:+UnlockExperimentalVMOptions -XX:-UseRVC -jar renaissance-jmh-0.14.1.jar org.renaissance.scala.stm.JmhPhilosophers.runOperation
JmhPhilosophers.runOperation ss 40 14307.472 ± 656.456 ms/op
JmhPhilosophers.runOperation ss 40 13175.640 ± 303.038 ms/op
JmhPhilosophers.runOperation ss 40 13474.124 ± 349.349 ms/op
JmhPhilosophers.runOperation ss 40 13545.786 ± 327.735 ms/op
JmhPhilosophers.runOperation ss 40 13085.097 ± 306.891 ms/op
JmhPhilosophers.runOperation ss 40 12880.270 ± 265.028 ms/op
JmhPhilosophers.runOperation ss 40 13232.006 ± 209.613 ms/op
JmhPhilosophers.runOperation ss 40 13334.098 ± 443.757 ms/op
JmhPhilosophers.runOperation ss 40 13168.990 ± 575.965 ms/op
JmhPhilosophers.runOperation ss 40 13424.250 ± 381.084 ms/op
JmhPhilosophers.runOperation ss 40 13655.426 ± 428.624 ms/op
JmhPhilosophers.runOperation ss 40 14430.485 ± 488.797 ms/op
JmhPhilosophers.runOperation ss 40 13999.061 ± 359.320 ms/op
JmhPhilosophers.runOperation ss 40 13623.308 ± 531.513 ms/op
JmhPhilosophers.runOperation ss 40 13757.331 ± 373.905 ms/op
+ /home/ubuntu/yunyao/jdk19-release/bin/java -XX:+UnlockExperimentalVMOptions -XX:+UseRVC -jar renaissance-jmh-0.14.1.jar org.renaissance.scala.stm.JmhPhilosophers.runOperation
JmhPhilosophers.runOperation ss 40 12772.517 ± 227.409 ms/op
JmhPhilosophers.runOperation ss 40 13456.228 ± 498.724 ms/op
JmhPhilosophers.runOperation ss 40 13727.211 ± 476.491 ms/op
JmhPhilosophers.runOperation ss 40 13122.838 ± 246.673 ms/op
JmhPhilosophers.runOperation ss 40 13082.768 ± 405.194 ms/op
JmhPhilosophers.runOperation ss 40 13905.753 ± 456.474 ms/op
JmhPhilosophers.runOperation ss 40 13503.479 ± 351.191 ms/op
JmhPhilosophers.runOperation ss 40 13365.138 ± 380.285 ms/op
JmhPhilosophers.runOperation ss 40 13842.509 ± 487.629 ms/op
JmhPhilosophers.runOperation ss 40 13965.286 ± 330.423 ms/op
JmhPhilosophers.runOperation ss 40 13615.975 ± 352.590 ms/op
JmhPhilosophers.runOperation ss 40 13564.777 ± 452.947 ms/op
JmhPhilosophers.runOperation ss 40 13720.022 ± 519.965 ms/op
JmhPhilosophers.runOperation ss 40 14033.287 ± 404.377 ms/op
JmhPhilosophers.runOperation ss 40 13680.432 ± 539.549 ms/op
The noise here is a little big; I was wondering if it's stable on the FPGA?
Maybe I need to find some more stable tests anyway.
Best,
Xiaolin
------------------------------------------------------------------
From:Vladimir Kempik <vladimir.kempik at gmail.com>
Send Time:2022年9月8日(星期四) 20:24
To:郑孝林(云矅) <yunyao.zxl at alibaba-inc.com>
Cc:riscv-port-dev <riscv-port-dev-retn at openjdk.org>; Aleksey Shipilev <shade at redhat.com>; riscv-port-dev at openjdk.org <riscv-port-dev at openjdk.org>
Subject:Re: RVC by default?
Hello
To be more specific, I saw slight perf decrease with RVC only on a core running on fpga.
On thead c910 results ( -RVC and + RVC) are on par.
Regards, Vladimir
8 сент. 2022 г., в 15:09, Xiaolin Zheng <yunyao.zxl at alibaba-inc.com <mailto:yunyao.zxl at alibaba-inc.com >> написал(а):
Hi Aleksey and Vladimir,
The current RVC support is okay but not complete: it only covers ~10% of total instructions emitted (mostly C2 code, including some part of Stub code), and we might want to transform instructions into the compressed counterparts as much as possible, so maybe the design will change from a whitelist mode (the class CompressibleRegion) to a black list mode. There is one implementation at my local branch https://github.com/zhengxiaolinX/jdk/commits/REBASE-rvc-beautify <https://github.com/zhengxiaolinX/jdk/commits/REBASE-rvc-beautify > (might not be stable yet, I have not gotten enough time to give it a sufficient test on jtregs and specjbb2015/other benchmarks yet). There are plans reserved to commit them (which cover ~20% of instructions under some tests) after reviewing, but this is currently WIP and waiting loom port to merge first.
And thank you Vladimir for your observations, I will test the Renaissance benchmark as you have mentioned. I have given tests for specjbb2015 months before and found slight performance increase there; as far as I know, the compile time will increase for the transformation logic is extra overhead during the instruction emission phase, such as the code in Assembler::add. Theoretically, when running the compiled code with RVC turning on, though IPC and CPI are not changed, the code size shrinks; I think it should have the same effect as the icache size becoming larger. Maybe something goes wrong? :-) I might need to look into the performance problem in a high priority, so will test the Renaissance first.
Best,
Xiaolin
------------------------------------------------------------------
From:Aleksey Shipilev <shade at redhat.com <mailto:shade at redhat.com >>
Send Time:2022年9月8日(星期四) 18:34
To:undefined <undefined>; undefined <undefined>
Subject:RVC by default?
Hi,
I was looking at some generated code on RISC-V, and realized while we have RVC support, we don't 
enable it by default. On HiFive Unleashed:
$ test-jdk/bin/java -XX:+UnlockExperimentalVMOptions -XX:+PrintFlagsFinal 2>&1 | grep RVC
 bool UseRVC = false {ARCH 
experimental} {default}
Is there a reason not to do RVC by default? Can we reliably poll the RVC capabilities in current 
hardware?
-- 
Thanks,
-Aleksey
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