git: openjdk/riscv-port-jdk17u: riscv-port: 8290137: riscv: small refactoring for add_memory_int32/64

[duke]

Changeset: d5fe5af6
Author:    Dingli Zhang <dingli at iscas.ac.cn>
Committer: GitHub <noreply at github.com>
Date:      2023-04-05 10:14:12 +0000
URL:       https://git.openjdk.org/riscv-port-jdk17u/commit/d5fe5af679eeee8231c54df1b1f020585c46a5d5

8290137: riscv: small refactoring for add_memory_int32/64


! src/hotspot/cpu/riscv/assembler_riscv.cpp
! src/hotspot/cpu/riscv/assembler_riscv.hpp
! src/hotspot/cpu/riscv/c1_CodeStubs_riscv.cpp
! src/hotspot/cpu/riscv/c1_LIRAssembler_arraycopy_riscv.cpp
! src/hotspot/cpu/riscv/c1_LIRAssembler_riscv.cpp
! src/hotspot/cpu/riscv/macroAssembler_riscv.cpp
! src/hotspot/cpu/riscv/macroAssembler_riscv.hpp
! src/hotspot/cpu/riscv/vtableStubs_riscv.cpp