[riscv-port-jdk11u:riscv-port] Integrated: 8284937: riscv: should not allocate special register for temp

Gui Cao gcao at openjdk.org
Mon Apr 1 01:26:45 UTC 2024


On Thu, 28 Mar 2024 10:09:33 GMT, Gui Cao <gcao at openjdk.org> wrote:

> Hi, please help review this backport to riscv-port-jdk11u.
> Backport of [JDK-8284937](https://bugs.openjdk.org/browse/JDK-8284937). The original patch cannot be directly applied because riscv-port-jdk11u doesn't have riscv_v.ad and doesn't have c2_MacroAssembler, which uses MacroAssembler.
> 
> Testing:
> 
> - [x] Run tier1-3 tests on SOPHON SG2042 (release)

This pull request has now been integrated.

Changeset: c7d3a44e
Author:    Gui Cao <gcao at openjdk.org>
Committer: Fei Yang <fyang at openjdk.org>
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/c7d3a44e980b1a4a20cac37ed6196506596d2b92
Stats:     28 lines in 1 file changed: 0 ins; 0 del; 28 mod

8284937: riscv: should not allocate special register for temp

Reviewed-by: fyang
Backport-of: 145dfed03c21ffe233203c1117d02b552bd17630

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PR: https://git.openjdk.org/riscv-port-jdk11u/pull/17


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