From gcao at openjdk.org  Tue Sep  3 00:38:44 2024
From: gcao at openjdk.org (Gui Cao)
Date: Tue, 3 Sep 2024 00:38:44 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8337780: RISC-V: C2: Change C
 calling convention for sp to NS
In-Reply-To: <ifn1o8eQDu53dtkx6ZbDHixeJrfrJRhpu-_qXcSRnRE=.a0509548-1db7-4af9-aa72-7af4db774c09@github.com>
References: <ifn1o8eQDu53dtkx6ZbDHixeJrfrJRhpu-_qXcSRnRE=.a0509548-1db7-4af9-aa72-7af4db774c09@github.com>
Message-ID: <n4Mz_AJVN8To1gC0-DuipOcbUporcGAIt0IGYm5rOHU=.0d82e083-ece8-4202-a5b3-5f6a371cab40@github.com>

On Sun, 25 Aug 2024 14:36:24 GMT, Gui Cao <gcao at openjdk.org> wrote:

> Hi, Please help review this backport to riscv-port-jdk11u.
> Clean backport of JDK-8337780 to reduce frame size by 16 bytes and improve performance for some C2 runtime stubs as we do not have to save sp on the method entry.
> 
> ### Testing
> - [x] Run tier1-3 tests on SOPHON SG2042 (release)

Thanks for the review.

-------------

PR Comment: https://git.openjdk.org/riscv-port-jdk11u/pull/26#issuecomment-2325416240

From gcao at openjdk.org  Tue Sep  3 00:38:44 2024
From: gcao at openjdk.org (Gui Cao)
Date: Tue, 3 Sep 2024 00:38:44 GMT
Subject: [riscv-port-jdk11u:riscv-port] Integrated: 8337780: RISC-V: C2: Change
 C calling convention for sp to NS
In-Reply-To: <ifn1o8eQDu53dtkx6ZbDHixeJrfrJRhpu-_qXcSRnRE=.a0509548-1db7-4af9-aa72-7af4db774c09@github.com>
References: <ifn1o8eQDu53dtkx6ZbDHixeJrfrJRhpu-_qXcSRnRE=.a0509548-1db7-4af9-aa72-7af4db774c09@github.com>
Message-ID: <kh8hmdfuBtJT_ufhM2SHBEtLrfepFuy8oKLC0gAciKE=.12b61dd9-e1b4-4ca6-bfb7-331d5a74ef29@github.com>

On Sun, 25 Aug 2024 14:36:24 GMT, Gui Cao <gcao at openjdk.org> wrote:

> Hi, Please help review this backport to riscv-port-jdk11u.
> Clean backport of JDK-8337780 to reduce frame size by 16 bytes and improve performance for some C2 runtime stubs as we do not have to save sp on the method entry.
> 
> ### Testing
> - [x] Run tier1-3 tests on SOPHON SG2042 (release)

This pull request has now been integrated.

Changeset: 1f90ddd3
Author:    Gui Cao <gcao at openjdk.org>
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/1f90ddd39f8ba6e7d59d4ca85161adc554b613e4
Stats:     2 lines in 1 file changed: 0 ins; 0 del; 2 mod

8337780: RISC-V: C2: Change C calling convention for sp to NS

Reviewed-by: fyang
Backport-of: 53db937dd0766695906dc20c1dbbd3228c02fe1e

-------------

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/26

From gcao at openjdk.org  Tue Sep  3 12:41:57 2024
From: gcao at openjdk.org (Gui Cao)
Date: Tue, 3 Sep 2024 12:41:57 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8339248: RISC-V: Remove li64 macro
 assembler routine and related code
Message-ID: <i8FCyrwI-Bhuezrjw5YF7XIuZLM8gv2qMRjpDRBGsS0=.61a524f0-2969-4e3b-8a70-784f89ae5423@github.com>

Hi, The same issue also exists in riscv-port-jdk11u. So I would like to backport [JDK-8339248](https://bugs.openjdk.org/browse/JDK-8339248) to riscv-port-jdk11u. with this patch ,it will save us some unnecessary runtime checks. This is a risc-v specific change, risk is low.

### Testing
- [x] Run hotspot:tier1 tests on SOPHON SG2042 (release)

-------------

Commit messages:
 - Backport 8339248: RISC-V: Remove li64 macro assembler routine and related code

Changes: https://git.openjdk.org/riscv-port-jdk11u/pull/27/files
  Webrev: https://webrevs.openjdk.org/?repo=riscv-port-jdk11u&pr=27&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8339248
  Stats: 111 lines in 5 files changed: 0 ins; 111 del; 0 mod
  Patch: https://git.openjdk.org/riscv-port-jdk11u/pull/27.diff
  Fetch: git fetch https://git.openjdk.org/riscv-port-jdk11u.git pull/27/head:pull/27

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/27

From fyang at openjdk.org  Tue Sep  3 12:47:45 2024
From: fyang at openjdk.org (Fei Yang)
Date: Tue, 3 Sep 2024 12:47:45 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8339248: RISC-V: Remove li64
 macro assembler routine and related code
In-Reply-To: <i8FCyrwI-Bhuezrjw5YF7XIuZLM8gv2qMRjpDRBGsS0=.61a524f0-2969-4e3b-8a70-784f89ae5423@github.com>
References: <i8FCyrwI-Bhuezrjw5YF7XIuZLM8gv2qMRjpDRBGsS0=.61a524f0-2969-4e3b-8a70-784f89ae5423@github.com>
Message-ID: <7T8v2ND315DSTS29BD8hZ0AbLbnI-bOwna5u8_CKbbg=.900c9806-050b-46d4-9777-8b51f83bc543@github.com>

On Tue, 3 Sep 2024 12:36:16 GMT, Gui Cao <gcao at openjdk.org> wrote:

> Hi, The same issue also exists in riscv-port-jdk11u. So I would like to backport [JDK-8339248](https://bugs.openjdk.org/browse/JDK-8339248) to riscv-port-jdk11u. with this patch ,it will save us some unnecessary runtime checks. This is a risc-v specific change, risk is low.
> 
> ### Testing
> - [x] Run hotspot:tier1 tests on SOPHON SG2042 (release)

Looks good. Thanks.

-------------

Marked as reviewed by fyang (Lead).

PR Review: https://git.openjdk.org/riscv-port-jdk11u/pull/27#pullrequestreview-2277332570

From gcao at openjdk.org  Thu Sep  5 08:18:32 2024
From: gcao at openjdk.org (Gui Cao)
Date: Thu, 5 Sep 2024 08:18:32 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8339248: RISC-V: Remove li64
 macro assembler routine and related code
In-Reply-To: <i8FCyrwI-Bhuezrjw5YF7XIuZLM8gv2qMRjpDRBGsS0=.61a524f0-2969-4e3b-8a70-784f89ae5423@github.com>
References: <i8FCyrwI-Bhuezrjw5YF7XIuZLM8gv2qMRjpDRBGsS0=.61a524f0-2969-4e3b-8a70-784f89ae5423@github.com>
Message-ID: <85rLbTu8o-cPQlYsoANlfdD929vmNgYuTWqbg5R5ObE=.4c08175f-856a-4713-8135-bee426691dbd@github.com>

On Tue, 3 Sep 2024 12:36:16 GMT, Gui Cao <gcao at openjdk.org> wrote:

> Hi, The same issue also exists in riscv-port-jdk11u. So I would like to backport [JDK-8339248](https://bugs.openjdk.org/browse/JDK-8339248) to riscv-port-jdk11u. with this patch ,it will save us some unnecessary runtime checks. This is a risc-v specific change, risk is low.
> 
> ### Testing
> - [x] Run hotspot:tier1 tests on SOPHON SG2042 (release)

Thanks for the review.

-------------

PR Comment: https://git.openjdk.org/riscv-port-jdk11u/pull/27#issuecomment-2330888952

From gcao at openjdk.org  Thu Sep  5 08:18:32 2024
From: gcao at openjdk.org (Gui Cao)
Date: Thu, 5 Sep 2024 08:18:32 GMT
Subject: [riscv-port-jdk11u:riscv-port] Integrated: 8339248: RISC-V: Remove
 li64 macro assembler routine and related code
In-Reply-To: <i8FCyrwI-Bhuezrjw5YF7XIuZLM8gv2qMRjpDRBGsS0=.61a524f0-2969-4e3b-8a70-784f89ae5423@github.com>
References: <i8FCyrwI-Bhuezrjw5YF7XIuZLM8gv2qMRjpDRBGsS0=.61a524f0-2969-4e3b-8a70-784f89ae5423@github.com>
Message-ID: <3rJV5JsFfz90EnOhlfUtxDqKJAvLS92H7_9W3Kb2M28=.169c35a7-b87e-418c-bc4a-c5b82ef7d408@github.com>

On Tue, 3 Sep 2024 12:36:16 GMT, Gui Cao <gcao at openjdk.org> wrote:

> Hi, The same issue also exists in riscv-port-jdk11u. So I would like to backport [JDK-8339248](https://bugs.openjdk.org/browse/JDK-8339248) to riscv-port-jdk11u. with this patch ,it will save us some unnecessary runtime checks. This is a risc-v specific change, risk is low.
> 
> ### Testing
> - [x] Run hotspot:tier1 tests on SOPHON SG2042 (release)

This pull request has now been integrated.

Changeset: 62d370b9
Author:    Gui Cao <gcao at openjdk.org>
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/62d370b94a1897921ad740faa4dbb1ae20be6798
Stats:     111 lines in 5 files changed: 0 ins; 111 del; 0 mod

8339248: RISC-V: Remove li64 macro assembler routine and related code

Reviewed-by: fyang
Backport-of: 392bdd5734e0ad4e616d52bb7bcafcf85dccbf34

-------------

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/27

From gcao at openjdk.org  Tue Sep 10 00:57:44 2024
From: gcao at openjdk.org (Gui Cao)
Date: Tue, 10 Sep 2024 00:57:44 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8339548: GHA: RISC-V: Use Debian
 snapshot archive for bootstrap
Message-ID: <JhAbpq4bty7pyTtKBif40NGE1uiRWNdumxYlBqj-2y4=.f2799b4f-68b6-4e00-bbc8-22d7204cb377@github.com>

Hi all,

This pull request contains a backport of commit [9e0ccb8b](https://github.com/openjdk/jdk/commit/9e0ccb8bbd01ffbac466288977a770dd09e357af) from the [openjdk/jdk](https://git.openjdk.org/jdk) repository.

The commit being backported was authored by Fei Yang on 6 Sep 2024 and was reviewed by Aleksey Shipilev and Erik Joelsson.

Thanks!

Testing:

 - [ ] GHA linux-cross-build job

-------------

Commit messages:
 - Backport 8339548: GHA: RISC-V: Use Debian snapshot archive for bootstrap

Changes: https://git.openjdk.org/riscv-port-jdk11u/pull/28/files
  Webrev: https://webrevs.openjdk.org/?repo=riscv-port-jdk11u&pr=28&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8339548
  Stats: 1 line in 1 file changed: 0 ins; 0 del; 1 mod
  Patch: https://git.openjdk.org/riscv-port-jdk11u/pull/28.diff
  Fetch: git fetch https://git.openjdk.org/riscv-port-jdk11u.git pull/28/head:pull/28

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/28

From fyang at openjdk.org  Tue Sep 10 01:59:26 2024
From: fyang at openjdk.org (Fei Yang)
Date: Tue, 10 Sep 2024 01:59:26 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8339548: GHA: RISC-V: Use
 Debian snapshot archive for bootstrap
In-Reply-To: <JhAbpq4bty7pyTtKBif40NGE1uiRWNdumxYlBqj-2y4=.f2799b4f-68b6-4e00-bbc8-22d7204cb377@github.com>
References: <JhAbpq4bty7pyTtKBif40NGE1uiRWNdumxYlBqj-2y4=.f2799b4f-68b6-4e00-bbc8-22d7204cb377@github.com>
Message-ID: <PumFRU-tiKy3ijrChhGPg-W8YsJVu9YY_lxEzNtvBH0=.0aa8e25e-a6c5-4484-b5fd-cebd0c07feb7@github.com>

On Tue, 10 Sep 2024 00:53:12 GMT, Gui Cao <gcao at openjdk.org> wrote:

> Hi all,
> 
> This pull request contains a backport of commit [9e0ccb8b](https://github.com/openjdk/jdk/commit/9e0ccb8bbd01ffbac466288977a770dd09e357af) from the [openjdk/jdk](https://git.openjdk.org/jdk) repository.
> 
> The commit being backported was authored by Fei Yang on 6 Sep 2024 and was reviewed by Aleksey Shipilev and Erik Joelsson.
> 
> Thanks!
> 
> Testing:
> 
>  - [ ] GHA linux-cross-build job

Marked as reviewed by fyang (Lead).

-------------

PR Review: https://git.openjdk.org/riscv-port-jdk11u/pull/28#pullrequestreview-2291222118

From dzhang at openjdk.org  Wed Sep 11 03:50:45 2024
From: dzhang at openjdk.org (Dingli Zhang)
Date: Wed, 11 Sep 2024 03:50:45 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8287552: riscv: Fix comment typo
 in li64
Message-ID: <EW7WrDKMGQfHaKA09cmJ4kj__H0PC9n9r0ysmdTubxY=.1ade22b2-c8f4-4614-b85c-ea46f4ba9cfa@github.com>

Please review this backport to riscv-port-jdk11u.
Backport of [JDK-8287552](https://bugs.openjdk.java.net/browse/JDK-8287552). Applies not cleanly because [JDK-8339248](https://bugs.openjdk.org/browse/JDK-8339248) remove li64 macro assembler routine and related code. 
So this patch only unifies the immediate type in movptr_with_offset to int64_t.

Testing:

- Tier1 passed without new failure on lp4a(release).

-------------

Commit messages:
 - 8287552: riscv: Fix comment typo in li64

Changes: https://git.openjdk.org/riscv-port-jdk11u/pull/29/files
  Webrev: https://webrevs.openjdk.org/?repo=riscv-port-jdk11u&pr=29&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8287552
  Stats: 3 lines in 1 file changed: 0 ins; 0 del; 3 mod
  Patch: https://git.openjdk.org/riscv-port-jdk11u/pull/29.diff
  Fetch: git fetch https://git.openjdk.org/riscv-port-jdk11u.git pull/29/head:pull/29

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/29

From dzhang at openjdk.org  Wed Sep 11 04:05:58 2024
From: dzhang at openjdk.org (Dingli Zhang)
Date: Wed, 11 Sep 2024 04:05:58 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8290137: riscv: small refactoring
 for add_memory_int32/64
Message-ID: <FjFijozuWlo_q37LEcTCgc6XEnQ3ADfkW52ZH5nwr2o=.20b36c74-3747-4c5f-bbb5-27ea8a95113c@github.com>

Please review this backport to riscv-port-jdk11u.
Backport of [JDK-8290137](https://bugs.openjdk.org/browse/JDK-8290137). Applies not cleanly because [JDK-8339248](https://bugs.openjdk.org/browse/JDK-8339248) remove li64 macro assembler routine and related code. 

So I removed the changes of the li64 macro assembler routine. In addition to this there was an extra modification to `add_memory_int32` in `c1_MacroAssembler_riscv.cpp`.

Testing:
- Tier1 passed without new failure on lp4a (release).

-------------

Commit messages:
 - JDK-8290137: riscv: small refactoring for add_memory_int32/64

Changes: https://git.openjdk.org/riscv-port-jdk11u/pull/30/files
  Webrev: https://webrevs.openjdk.org/?repo=riscv-port-jdk11u&pr=30&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8290137
  Stats: 66 lines in 9 files changed: 40 ins; 0 del; 26 mod
  Patch: https://git.openjdk.org/riscv-port-jdk11u/pull/30.diff
  Fetch: git fetch https://git.openjdk.org/riscv-port-jdk11u.git pull/30/head:pull/30

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/30

From gcao at openjdk.org  Wed Sep 11 07:30:32 2024
From: gcao at openjdk.org (Gui Cao)
Date: Wed, 11 Sep 2024 07:30:32 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8287552: riscv: Fix comment
 typo in li64
In-Reply-To: <EW7WrDKMGQfHaKA09cmJ4kj__H0PC9n9r0ysmdTubxY=.1ade22b2-c8f4-4614-b85c-ea46f4ba9cfa@github.com>
References: <EW7WrDKMGQfHaKA09cmJ4kj__H0PC9n9r0ysmdTubxY=.1ade22b2-c8f4-4614-b85c-ea46f4ba9cfa@github.com>
Message-ID: <PcRDI-v052mJdf-BQ_tdqjY6Rs9IHiw1Rx7A1-QG9vw=.b810334d-c6c3-4263-875f-28c539e09068@github.com>

On Wed, 11 Sep 2024 03:45:14 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk11u.
> Backport of [JDK-8287552](https://bugs.openjdk.java.net/browse/JDK-8287552). Applies not cleanly because [JDK-8339248](https://bugs.openjdk.org/browse/JDK-8339248) remove li64 macro assembler routine and related code. 
> So this patch only unifies the immediate type in movptr_with_offset to int64_t.
> 
> Testing:
> 
> - Tier1 passed without new failure on lp4a(release).

Looks good.

-------------

Marked as reviewed by gcao (Committer).

PR Review: https://git.openjdk.org/riscv-port-jdk11u/pull/29#pullrequestreview-2295905746

From fyang at openjdk.org  Wed Sep 11 13:04:29 2024
From: fyang at openjdk.org (Fei Yang)
Date: Wed, 11 Sep 2024 13:04:29 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8287552: riscv: Fix comment
 typo in li64
In-Reply-To: <EW7WrDKMGQfHaKA09cmJ4kj__H0PC9n9r0ysmdTubxY=.1ade22b2-c8f4-4614-b85c-ea46f4ba9cfa@github.com>
References: <EW7WrDKMGQfHaKA09cmJ4kj__H0PC9n9r0ysmdTubxY=.1ade22b2-c8f4-4614-b85c-ea46f4ba9cfa@github.com>
Message-ID: <ftY8Na0Iirrd3QlazFWZc1HplFSCRUmaxS_6UAfbmrI=.b354ec78-ab4c-4bdf-b789-4843fe0d6b06@github.com>

On Wed, 11 Sep 2024 03:45:14 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk11u.
> Backport of [JDK-8287552](https://bugs.openjdk.java.net/browse/JDK-8287552). Applies not cleanly because [JDK-8339248](https://bugs.openjdk.org/browse/JDK-8339248) remove li64 macro assembler routine and related code. 
> So this patch only unifies the immediate type in movptr_with_offset to int64_t.
> 
> Testing:
> 
> - Tier1 passed without new failure on lp4a(release).

Marked as reviewed by fyang (Lead).

-------------

PR Review: https://git.openjdk.org/riscv-port-jdk11u/pull/29#pullrequestreview-2296922749

From gcao at openjdk.org  Wed Sep 11 14:03:24 2024
From: gcao at openjdk.org (Gui Cao)
Date: Wed, 11 Sep 2024 14:03:24 GMT
Subject: [riscv-port-jdk11u:riscv-port] Integrated: 8339548: GHA: RISC-V: Use
 Debian snapshot archive for bootstrap
In-Reply-To: <JhAbpq4bty7pyTtKBif40NGE1uiRWNdumxYlBqj-2y4=.f2799b4f-68b6-4e00-bbc8-22d7204cb377@github.com>
References: <JhAbpq4bty7pyTtKBif40NGE1uiRWNdumxYlBqj-2y4=.f2799b4f-68b6-4e00-bbc8-22d7204cb377@github.com>
Message-ID: <zRgM6tv8enJjR2GmKP0UsTR7W73mCCKWllYac0VHz7w=.96a484e3-ba94-439e-ba33-f66e751b1734@github.com>

On Tue, 10 Sep 2024 00:53:12 GMT, Gui Cao <gcao at openjdk.org> wrote:

> Hi all,
> 
> This pull request contains a backport of commit [9e0ccb8b](https://github.com/openjdk/jdk/commit/9e0ccb8bbd01ffbac466288977a770dd09e357af) from the [openjdk/jdk](https://git.openjdk.org/jdk) repository.
> 
> The commit being backported was authored by Fei Yang on 6 Sep 2024 and was reviewed by Aleksey Shipilev and Erik Joelsson.
> 
> Thanks!
> 
> Testing:
> 
>  - [x] GHA linux-cross-build job

This pull request has now been integrated.

Changeset: 9f4afcb6
Author:    Gui Cao <gcao at openjdk.org>
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/9f4afcb6a13f85ce24ed2c6d5a5a9159d31c4508
Stats:     1 line in 1 file changed: 0 ins; 0 del; 1 mod

8339548: GHA: RISC-V: Use Debian snapshot archive for bootstrap

Reviewed-by: fyang
Backport-of: 9e0ccb8bbd01ffbac466288977a770dd09e357af

-------------

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/28

From gcao at openjdk.org  Wed Sep 11 14:03:24 2024
From: gcao at openjdk.org (Gui Cao)
Date: Wed, 11 Sep 2024 14:03:24 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8339548: GHA: RISC-V: Use
 Debian snapshot archive for bootstrap
In-Reply-To: <JhAbpq4bty7pyTtKBif40NGE1uiRWNdumxYlBqj-2y4=.f2799b4f-68b6-4e00-bbc8-22d7204cb377@github.com>
References: <JhAbpq4bty7pyTtKBif40NGE1uiRWNdumxYlBqj-2y4=.f2799b4f-68b6-4e00-bbc8-22d7204cb377@github.com>
Message-ID: <keJlgzyjA-X5Rcbd6tAIK0cRvp_yEx6ylu2TQzKlsWg=.13f5534d-d6ab-4d34-a7bb-fdacfaca133d@github.com>

On Tue, 10 Sep 2024 00:53:12 GMT, Gui Cao <gcao at openjdk.org> wrote:

> Hi all,
> 
> This pull request contains a backport of commit [9e0ccb8b](https://github.com/openjdk/jdk/commit/9e0ccb8bbd01ffbac466288977a770dd09e357af) from the [openjdk/jdk](https://git.openjdk.org/jdk) repository.
> 
> The commit being backported was authored by Fei Yang on 6 Sep 2024 and was reviewed by Aleksey Shipilev and Erik Joelsson.
> 
> Thanks!
> 
> Testing:
> 
>  - [x] GHA linux-cross-build job

Thanks for the review.

-------------

PR Comment: https://git.openjdk.org/riscv-port-jdk11u/pull/28#issuecomment-2343757961

From gcao at openjdk.org  Wed Sep 11 14:14:22 2024
From: gcao at openjdk.org (Gui Cao)
Date: Wed, 11 Sep 2024 14:14:22 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8290137: riscv: small
 refactoring for add_memory_int32/64
In-Reply-To: <FjFijozuWlo_q37LEcTCgc6XEnQ3ADfkW52ZH5nwr2o=.20b36c74-3747-4c5f-bbb5-27ea8a95113c@github.com>
References: <FjFijozuWlo_q37LEcTCgc6XEnQ3ADfkW52ZH5nwr2o=.20b36c74-3747-4c5f-bbb5-27ea8a95113c@github.com>
Message-ID: <ucc0HF2cG2gTDRNwI6Y0Bnr6BNTHMoEheOhkEMJsqRg=.af658590-9e79-4638-9e53-50a7de1d75c9@github.com>

On Wed, 11 Sep 2024 03:59:46 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk11u.
> Backport of [JDK-8290137](https://bugs.openjdk.org/browse/JDK-8290137). Applies not cleanly because [JDK-8339248](https://bugs.openjdk.org/browse/JDK-8339248) remove li64 macro assembler routine and related code. 
> 
> So I removed the changes of the li64 macro assembler routine. In addition to this there was an extra modification to `add_memory_int32` in `c1_MacroAssembler_riscv.cpp`.
> 
> Testing:
> - Tier1 passed without new failure on lp4a (release).

Looks good.

-------------

Marked as reviewed by gcao (Committer).

PR Review: https://git.openjdk.org/riscv-port-jdk11u/pull/30#pullrequestreview-2297235057

From duke at openjdk.org  Wed Sep 11 14:54:15 2024
From: duke at openjdk.org (duke)
Date: Wed, 11 Sep 2024 14:54:15 GMT
Subject: git: openjdk/riscv-port-jdk11u: riscv-port: 8 new changesets
Message-ID: <f3454026-10b0-43a5-9b34-1763f89b5269@openjdk.org>

Changeset: ce572dfe
Branch: riscv-port
Author:    Goetz Lindenmaier <goetz at openjdk.org>
Date:      2024-08-28 10:25:28 +0000
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/ce572dfede792da0eb1b98ac3d8d1df7064dea33

8339082: Bump update version for OpenJDK: jdk-11.0.26

Reviewed-by: sgehwolf

! .jcheck/conf
! make/autoconf/version-numbers

Changeset: 8c31358c
Branch: riscv-port
Author:    Andrew Lu <andrewlu at openjdk.org>
Date:      2024-09-02 02:23:53 +0000
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/8c31358ccc9d07f9512bc56159c85ce465e25135

8328300: Convert PrintDialogsTest.java from Applet to main program

Reviewed-by: mbaesken
Backport-of: dea94f4445b9389339cf7ca0eef688ca56c17814

! test/jdk/java/awt/Modal/PrintDialogsTest/PrintDialogsTest.html
! test/jdk/java/awt/Modal/PrintDialogsTest/PrintDialogsTest.java

Changeset: 76b8327b
Branch: riscv-port
Author:    Andrew Lu <andrewlu at openjdk.org>
Date:      2024-09-02 02:24:11 +0000
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/76b8327ba08e2d57b64cd266a3eb3f1a3232a1a5

8328642: Convert applet test MouseDraggedOutCauseScrollingTest.html to main

Reviewed-by: mbaesken
Backport-of: ab183e437c18b445e9c022a4d74de818d4ccecbe

- test/jdk/java/awt/List/MouseDraggedOutCauseScrollingTest/MouseDraggedOutCauseScrollingTest.html
! test/jdk/java/awt/List/MouseDraggedOutCauseScrollingTest/MouseDraggedOutCauseScrollingTest.java

Changeset: ffcdc104
Branch: riscv-port
Author:    Andrew Lu <andrewlu at openjdk.org>
Date:      2024-09-02 02:24:26 +0000
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/ffcdc104058ab2b58d8303f318c2e0ee0dc93a54

8315936: Parallelize gc/stress/TestStressG1Humongous.java test

Backport-of: 3f19df685c342cef212305cca630331878a24e79

! test/hotspot/jtreg/gc/stress/TestStressG1Humongous.java

Changeset: 6ee8bacf
Branch: riscv-port
Author:    Goetz Lindenmaier <goetz at openjdk.org>
Date:      2024-09-05 09:56:35 +0000
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/6ee8bacfdda51b53178913ebf711ac9feacce26e

8338139: {ClassLoading,Memory}MXBean::isVerbose methods are inconsistent with their setVerbose methods

Reviewed-by: phh
Backport-of: 897f433b33a46d56cc6972b1c6b4405ecaa4dea9

! src/hotspot/share/services/classLoadingService.cpp
! src/hotspot/share/services/classLoadingService.hpp
! src/hotspot/share/services/memoryService.cpp
! src/hotspot/share/services/memoryService.hpp
+ test/jdk/java/lang/management/ClassLoadingMXBean/TestVerboseClassLoading.java
+ test/jdk/java/lang/management/MemoryMXBean/TestVerboseMemory.java

Changeset: 90ad5b18
Branch: riscv-port
Author:    Goetz Lindenmaier <goetz at openjdk.org>
Date:      2024-09-08 12:34:28 +0000
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/90ad5b18de314faca19e322bb21a4c33cec54785

8337664: Distrust TLS server certificates issued after Oct 2024 and anchored by Entrust Root CAs

Reviewed-by: phh
Backport-of: 7d49c52272b54070a13b02708dd7ce5f8e375a06

! src/java.base/share/classes/sun/security/validator/CADistrustPolicy.java
+ src/java.base/share/classes/sun/security/validator/EntrustTLSPolicy.java
! src/java.base/share/conf/security/java.security
+ test/jdk/sun/security/ssl/X509TrustManagerImpl/Entrust/Distrust.java
+ test/jdk/sun/security/ssl/X509TrustManagerImpl/Entrust/affirmtrustcommercialca-chain.pem
+ test/jdk/sun/security/ssl/X509TrustManagerImpl/Entrust/affirmtrustnetworkingca-chain.pem
+ test/jdk/sun/security/ssl/X509TrustManagerImpl/Entrust/affirmtrustpremiumca-chain.pem
+ test/jdk/sun/security/ssl/X509TrustManagerImpl/Entrust/affirmtrustpremiumeccca-chain.pem
+ test/jdk/sun/security/ssl/X509TrustManagerImpl/Entrust/entrust2048ca-chain.pem
+ test/jdk/sun/security/ssl/X509TrustManagerImpl/Entrust/entrustevca-chain.pem
+ test/jdk/sun/security/ssl/X509TrustManagerImpl/Entrust/entrustrootcaec1-chain.pem
+ test/jdk/sun/security/ssl/X509TrustManagerImpl/Entrust/entrustrootcag2-chain.pem
+ test/jdk/sun/security/ssl/X509TrustManagerImpl/Entrust/entrustrootcag4-chain.pem

Changeset: 934decc1
Branch: riscv-port
Author:    Goetz Lindenmaier <goetz at openjdk.org>
Date:      2024-09-11 09:18:16 +0000
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/934decc1475e5acc00be23c87507274f005780b4

Merge


Changeset: 6bca4b07
Branch: riscv-port
Author:    Fei Yang <yangfei at iscas.ac.cn>
Date:      2024-09-11 22:42:37 +0000
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/6bca4b070bd71b321a6745f31c8df23d7f3332da

Merge branch 'master' into riscv-port

! .jcheck/conf
! .jcheck/conf


From duke at openjdk.org  Wed Sep 11 15:26:29 2024
From: duke at openjdk.org (duke)
Date: Wed, 11 Sep 2024 15:26:29 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8287552: riscv: Fix comment
 typo in li64
In-Reply-To: <EW7WrDKMGQfHaKA09cmJ4kj__H0PC9n9r0ysmdTubxY=.1ade22b2-c8f4-4614-b85c-ea46f4ba9cfa@github.com>
References: <EW7WrDKMGQfHaKA09cmJ4kj__H0PC9n9r0ysmdTubxY=.1ade22b2-c8f4-4614-b85c-ea46f4ba9cfa@github.com>
Message-ID: <EQ0s7fbgVWjbpEFDwOOX_BZm7fKVTHCYphOAR_-4Jy4=.c67883a8-5c33-4cca-bd40-78527d974e4e@github.com>

On Wed, 11 Sep 2024 03:45:14 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk11u.
> Backport of [JDK-8287552](https://bugs.openjdk.java.net/browse/JDK-8287552). Applies not cleanly because [JDK-8339248](https://bugs.openjdk.org/browse/JDK-8339248) remove li64 macro assembler routine and related code. 
> So this patch only unifies the immediate type in movptr_with_offset to int64_t.
> 
> Testing:
> 
> - Tier1 passed without new failure on lp4a(release).

@DingliZhang 
Your change (at version 05b4727dd898b729cfcb0b07c08a3bf890d680c7) is now ready to be sponsored by a Committer.

-------------

PR Comment: https://git.openjdk.org/riscv-port-jdk11u/pull/29#issuecomment-2343983429

From dzhang at openjdk.org  Thu Sep 12 00:32:31 2024
From: dzhang at openjdk.org (Dingli Zhang)
Date: Thu, 12 Sep 2024 00:32:31 GMT
Subject: [riscv-port-jdk11u:riscv-port] Integrated: 8287552: riscv: Fix comment
 typo in li64
In-Reply-To: <EW7WrDKMGQfHaKA09cmJ4kj__H0PC9n9r0ysmdTubxY=.1ade22b2-c8f4-4614-b85c-ea46f4ba9cfa@github.com>
References: <EW7WrDKMGQfHaKA09cmJ4kj__H0PC9n9r0ysmdTubxY=.1ade22b2-c8f4-4614-b85c-ea46f4ba9cfa@github.com>
Message-ID: <vuHcoDMrcBTH76nxua_I495UpC-_GOiKbgtB5GB7vmo=.8056c463-ff50-4332-a5e1-70a0cb1763fd@github.com>

On Wed, 11 Sep 2024 03:45:14 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk11u.
> Backport of [JDK-8287552](https://bugs.openjdk.java.net/browse/JDK-8287552). Applies not cleanly because [JDK-8339248](https://bugs.openjdk.org/browse/JDK-8339248) remove li64 macro assembler routine and related code. 
> So this patch only unifies the immediate type in movptr_with_offset to int64_t.
> 
> Testing:
> 
> - Tier1 passed without new failure on lp4a(release).

This pull request has now been integrated.

Changeset: b1598883
Author:    Dingli Zhang <dzhang at openjdk.org>
Committer: Gui Cao <gcao at openjdk.org>
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/b15988837e43e0d63a74d8432791457dc8750d87
Stats:     3 lines in 1 file changed: 0 ins; 0 del; 3 mod

8287552: riscv: Fix comment typo in li64

Reviewed-by: gcao, fyang
Backport-of: 0ef3d8551d85c9004087464d656074dac753acfd

-------------

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/29

From fyang at openjdk.org  Thu Sep 12 01:39:15 2024
From: fyang at openjdk.org (Fei Yang)
Date: Thu, 12 Sep 2024 01:39:15 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8290137: riscv: small
 refactoring for add_memory_int32/64
In-Reply-To: <FjFijozuWlo_q37LEcTCgc6XEnQ3ADfkW52ZH5nwr2o=.20b36c74-3747-4c5f-bbb5-27ea8a95113c@github.com>
References: <FjFijozuWlo_q37LEcTCgc6XEnQ3ADfkW52ZH5nwr2o=.20b36c74-3747-4c5f-bbb5-27ea8a95113c@github.com>
Message-ID: <mpGDgUfegHvXR3dfnb5rGmsg3ddHCaCQ4tT60ehd0cM=.8d6b0d44-4f5f-4b64-adfa-b879473670b2@github.com>

On Wed, 11 Sep 2024 03:59:46 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk11u.
> Backport of [JDK-8290137](https://bugs.openjdk.org/browse/JDK-8290137). Applies not cleanly because [JDK-8339248](https://bugs.openjdk.org/browse/JDK-8339248) remove li64 macro assembler routine and related code. 
> 
> So I removed the changes of the li64 macro assembler routine. In addition to this there was an extra modification to `add_memory_int32` in `c1_MacroAssembler_riscv.cpp`.
> 
> Testing:
> - Tier1 passed without new failure on lp4a (release).

Marked as reviewed by fyang (Lead).

-------------

PR Review: https://git.openjdk.org/riscv-port-jdk11u/pull/30#pullrequestreview-2299054022

From duke at openjdk.org  Thu Sep 12 02:22:28 2024
From: duke at openjdk.org (duke)
Date: Thu, 12 Sep 2024 02:22:28 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8290137: riscv: small
 refactoring for add_memory_int32/64
In-Reply-To: <FjFijozuWlo_q37LEcTCgc6XEnQ3ADfkW52ZH5nwr2o=.20b36c74-3747-4c5f-bbb5-27ea8a95113c@github.com>
References: <FjFijozuWlo_q37LEcTCgc6XEnQ3ADfkW52ZH5nwr2o=.20b36c74-3747-4c5f-bbb5-27ea8a95113c@github.com>
Message-ID: <wsJi4AeiPwOLhC12KtHQCv3fuExAPY8cqtVNmIw0ynM=.b571b76b-912a-4429-bac4-d20f61ae4079@github.com>

On Wed, 11 Sep 2024 03:59:46 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk11u.
> Backport of [JDK-8290137](https://bugs.openjdk.org/browse/JDK-8290137). Applies not cleanly because [JDK-8339248](https://bugs.openjdk.org/browse/JDK-8339248) remove li64 macro assembler routine and related code. 
> 
> So I removed the changes of the li64 macro assembler routine. In addition to this there was an extra modification to `add_memory_int32` in `c1_MacroAssembler_riscv.cpp`.
> 
> Testing:
> - Tier1 passed without new failure on lp4a (release).

@DingliZhang 
Your change (at version 0614c67cf03044deba9039531f4a06b73b4cf8a0) is now ready to be sponsored by a Committer.

-------------

PR Comment: https://git.openjdk.org/riscv-port-jdk11u/pull/30#issuecomment-2345124269

From decodewar at gmail.com  Thu Sep 12 07:45:56 2024
From: decodewar at gmail.com (zifeihan)
Date: Thu, 12 Sep 2024 15:45:56 +0800
Subject: CFV: New RISC-V Port Committer: Dingli Zhang
Message-ID: <CAAeyWd86K7jTgCEOobO16BzsDjEMO6E_tAj=SyehOfpYtN-6OQ@mail.gmail.com>

I hereby nominate Dingli Zhang (dzhang) [0] to RISC-V Port Committer.

He has already made a number of contributions to both trunk [1] and
backporting
work for RISC-V Port project repos like riscv-port-jdk11u and
riscv-port-jdk17u [2][3].
Having the committer role would aid this backporting work by avoiding the
need to
wait for sponsorship of fixes, after review & approval.
By the way, he currently maintains the jdk RISC-V port on openEuler and is
a maintainer
of the Java SIG, and expects more backporting in the future.

Votes are due by 9:00 UTC on Thursday 26, September 2024.

Only current RISC-V Port Committer [4] are eligible to vote on this
nomination.
Votes must be cast in the open replying to this mailing list.

For Lazy Consensus voting instructions, see [5].

Gui Cao

[0] https://openjdk.org/census#dzhang
[1]
https://github.com/openjdk/jdk/pulls?q=is%3Apr+is%3Aclosed+author%3ADingliZhang
[2]
https://github.com/openjdk/riscv-port-jdk11u/pulls?q=is%3Apr+is%3Aclosed+author%3ADingliZhang
[3]
https://github.com/openjdk/riscv-port-jdk17u/pulls?q=is%3Apr+is%3Aclosed+author%3ADingliZhang
[4] https://openjdk.java.net/census#riscv-port
[5] https://openjdk.java.net/projects/#committer-vote
-------------- next part --------------
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From dzhang at openjdk.org  Thu Sep 12 07:58:30 2024
From: dzhang at openjdk.org (Dingli Zhang)
Date: Thu, 12 Sep 2024 07:58:30 GMT
Subject: [riscv-port-jdk11u:riscv-port] Integrated: 8290137: riscv: small
 refactoring for add_memory_int32/64
In-Reply-To: <FjFijozuWlo_q37LEcTCgc6XEnQ3ADfkW52ZH5nwr2o=.20b36c74-3747-4c5f-bbb5-27ea8a95113c@github.com>
References: <FjFijozuWlo_q37LEcTCgc6XEnQ3ADfkW52ZH5nwr2o=.20b36c74-3747-4c5f-bbb5-27ea8a95113c@github.com>
Message-ID: <bz7wdZ4Pfa0apNfk72aCrETGtZCbu8EAVfA0sUeNJRw=.07e6a921-c7a2-400b-b439-330e9639370d@github.com>

On Wed, 11 Sep 2024 03:59:46 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk11u.
> Backport of [JDK-8290137](https://bugs.openjdk.org/browse/JDK-8290137). Applies not cleanly because [JDK-8339248](https://bugs.openjdk.org/browse/JDK-8339248) remove li64 macro assembler routine and related code. 
> 
> So I removed the changes of the li64 macro assembler routine. In addition to this there was an extra modification to `add_memory_int32` in `c1_MacroAssembler_riscv.cpp`.
> 
> Testing:
> - Tier1 passed without new failure on lp4a (release).

This pull request has now been integrated.

Changeset: 06f81133
Author:    Dingli Zhang <dzhang at openjdk.org>
Committer: Gui Cao <gcao at openjdk.org>
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/06f81133fd7baa4be3faaa509b06b7f4969215a3
Stats:     66 lines in 9 files changed: 40 ins; 0 del; 26 mod

8290137: riscv: small refactoring for add_memory_int32/64

Reviewed-by: gcao, fyang
Backport-of: 92067e200346c41c2f43763edc01c97c7da1a9e6

-------------

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/30

From decodewar at gmail.com  Thu Sep 12 08:19:25 2024
From: decodewar at gmail.com (zifeihan)
Date: Thu, 12 Sep 2024 16:19:25 +0800
Subject: CFV: New RISC-V Port Committer: Dingli Zhang
In-Reply-To: <CAAeyWd86K7jTgCEOobO16BzsDjEMO6E_tAj=SyehOfpYtN-6OQ@mail.gmail.com>
References: <CAAeyWd86K7jTgCEOobO16BzsDjEMO6E_tAj=SyehOfpYtN-6OQ@mail.gmail.com>
Message-ID: <CAAeyWd9kmv_vEsaZsXSdD4RPjyOyO4csPXBKZ=RCK+ae3jW0Dg@mail.gmail.com>

Vote: yes

On Thu, Sep 12, 2024 at 3:45?PM zifeihan <decodewar at gmail.com> wrote:

> I hereby nominate Dingli Zhang (dzhang) [0] to RISC-V Port Committer.
>
> He has already made a number of contributions to both trunk [1] and
backporting
> work for RISC-V Port project repos like riscv-port-jdk11u and
riscv-port-jdk17u [2][3].
> Having the committer role would aid this backporting work by avoiding the
need to
> wait for sponsorship of fixes, after review & approval.
> By the way, he currently maintains the jdk RISC-V port on openEuler and
is a maintainer
> of the Java SIG, and expects more backporting in the future.
>
> Votes are due by 9:00 UTC on Thursday 26, September 2024.
>
> Only current RISC-V Port Committer [4] are eligible to vote on this
nomination.
> Votes must be cast in the open replying to this mailing list.
>
> For Lazy Consensus voting instructions, see [5].
>
> Gui Cao
>
> [0] https://openjdk.org/census#dzhang
> [1]
https://github.com/openjdk/jdk/pulls?q=is%3Apr+is%3Aclosed+author%3ADingliZhang
> [2]
https://github.com/openjdk/riscv-port-jdk11u/pulls?q=is%3Apr+is%3Aclosed+author%3ADingliZhang
> [3]
https://github.com/openjdk/riscv-port-jdk17u/pulls?q=is%3Apr+is%3Aclosed+author%3ADingliZhang
> [4] https://openjdk.java.net/census#riscv-port
> [5] https://openjdk.java.net/projects/#committer-vote>

>
-------------- next part --------------
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From yangfei at iscas.ac.cn  Thu Sep 12 08:28:57 2024
From: yangfei at iscas.ac.cn (yangfei at iscas.ac.cn)
Date: Thu, 12 Sep 2024 16:28:57 +0800 (GMT+08:00)
Subject: CFV: New RISC-V Port Committer: Dingli Zhang
In-Reply-To: <CAAeyWd86K7jTgCEOobO16BzsDjEMO6E_tAj=SyehOfpYtN-6OQ@mail.gmail.com>
References: <CAAeyWd86K7jTgCEOobO16BzsDjEMO6E_tAj=SyehOfpYtN-6OQ@mail.gmail.com>
Message-ID: <7e4f680a.45bae.191e5598f53.Coremail.yangfei@iscas.ac.cn>

Vote: yes

-----Original Messages-----
From:zifeihan <decodewar at gmail.com>
Sent Time:2024-09-12 15:45:56 (Thursday)
To: riscv-port-dev at openjdk.org
Cc: 
Subject: CFV: New RISC-V Port Committer: Dingli Zhang

I hereby nominate Dingli Zhang (dzhang) [0] to RISC-V Port Committer.

He has already made a number of contributions to both trunk [1] and backporting
work for RISC-V Port project repos like riscv-port-jdk11u and riscv-port-jdk17u [2][3].
Having the committer role would aid this backporting work by avoiding the need to
wait for sponsorship of fixes, after review &amp; approval.
By the way, he currently maintains the jdk RISC-V port on openEuler and is a maintainer
of the Java SIG, and expects more backporting in the future.

Votes are due by 9:00 UTC on Thursday 26, September 2024.

Only current RISC-V Port Committer [4] are eligible to vote on this nomination.
Votes must be cast in the open replying to this mailing list.

For Lazy Consensus voting instructions, see [5].  
  Gui Cao  
  
[0] https://openjdk.org/census#dzhang
[1] https://github.com/openjdk/jdk/pulls?q=is%3Apr+is%3Aclosed+author%3ADingliZhang
[2] https://github.com/openjdk/riscv-port-jdk11u/pulls?q=is%3Apr+is%3Aclosed+author%3ADingliZhang
[3] https://github.com/openjdk/riscv-port-jdk17u/pulls?q=is%3Apr+is%3Aclosed+author%3ADingliZhang
[4] https://openjdk.java.net/census#riscv-port
[5] https://openjdk.java.net/projects/#committer-vote


</decodewar at gmail.com>

From dzhang at openjdk.org  Fri Sep 13 03:58:57 2024
From: dzhang at openjdk.org (Dingli Zhang)
Date: Fri, 13 Sep 2024 03:58:57 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8292867: RISC-V: Simplify weak CAS
 return value handling
Message-ID: <dyBbzq7Pq5DCgJ1f8O56U9jm483nBDlwXUW5fvigvqs=.5d9e59a3-3129-43c2-8f19-cf34f5e539a1@github.com>

Please review this backport to riscv-port-jdk11u.
Backport of [JDK-8292867](https://bugs.openjdk.org/browse/JDK-8292867). Applies cleanly.

Testing:

- Tier1 passed without new failure on lp4a (release).

-------------

Commit messages:
 - 8292867: RISC-V: Simplify weak CAS return value handling

Changes: https://git.openjdk.org/riscv-port-jdk11u/pull/31/files
  Webrev: https://webrevs.openjdk.org/?repo=riscv-port-jdk11u&pr=31&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8292867
  Stats: 39 lines in 2 files changed: 2 ins; 13 del; 24 mod
  Patch: https://git.openjdk.org/riscv-port-jdk11u/pull/31.diff
  Fetch: git fetch https://git.openjdk.org/riscv-port-jdk11u.git pull/31/head:pull/31

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/31

From yadonn.wang at huawei.com  Fri Sep 13 04:09:00 2024
From: yadonn.wang at huawei.com (wangyadong (E))
Date: Fri, 13 Sep 2024 04:09:00 +0000
Subject: New RISC-V Port Committer: Dingli Zhang
In-Reply-To: <CAAeyWd86K7jTgCEOobO16BzsDjEMO6E_tAj=SyehOfpYtN-6OQ@mail.gmail.com>
References: <CAAeyWd86K7jTgCEOobO16BzsDjEMO6E_tAj=SyehOfpYtN-6OQ@mail.gmail.com>
Message-ID: <65cdc115d7aa43d3b4a710c26d4b813e@huawei.com>

Vote: yes.

From: riscv-port-dev [mailto:riscv-port-dev-retn at openjdk.org] On Behalf Of zifeihan
Sent: Thursday, September 12, 2024 3:46 PM
To: riscv-port-dev at openjdk.org
Subject: CFV: New RISC-V Port Committer: Dingli Zhang

I hereby nominate Dingli Zhang (dzhang) [0] to RISC-V Port Committer.

He has already made a number of contributions to both trunk [1] and backporting
work for RISC-V Port project repos like riscv-port-jdk11u and riscv-port-jdk17u [2][3].
Having the committer role would aid this backporting work by avoiding the need to
wait for sponsorship of fixes, after review & approval.
By the way, he currently maintains the jdk RISC-V port on openEuler and is a maintainer
of the Java SIG, and expects more backporting in the future.

Votes are due by 9:00 UTC on Thursday 26, September 2024.

Only current RISC-V Port Committer [4] are eligible to vote on this nomination.
Votes must be cast in the open replying to this mailing list.

For Lazy Consensus voting instructions, see [5].

Gui Cao

[0] https://openjdk.org/census#dzhang
[1] https://github.com/openjdk/jdk/pulls?q=is%3Apr+is%3Aclosed+author%3ADingliZhang
[2] https://github.com/openjdk/riscv-port-jdk11u/pulls?q=is%3Apr+is%3Aclosed+author%3ADingliZhang
[3] https://github.com/openjdk/riscv-port-jdk17u/pulls?q=is%3Apr+is%3Aclosed+author%3ADingliZhang
[4] https://openjdk.java.net/census#riscv-port
[5] https://openjdk.java.net/projects/#committer-vote
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From gcao at openjdk.org  Sat Sep 14 00:17:22 2024
From: gcao at openjdk.org (Gui Cao)
Date: Sat, 14 Sep 2024 00:17:22 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8292867: RISC-V: Simplify weak
 CAS return value handling
In-Reply-To: <dyBbzq7Pq5DCgJ1f8O56U9jm483nBDlwXUW5fvigvqs=.5d9e59a3-3129-43c2-8f19-cf34f5e539a1@github.com>
References: <dyBbzq7Pq5DCgJ1f8O56U9jm483nBDlwXUW5fvigvqs=.5d9e59a3-3129-43c2-8f19-cf34f5e539a1@github.com>
Message-ID: <4HF6Z5cBP_u2IWbUcmqWbTnFlpujb4Yg1RXWumC_knQ=.cfbc86bb-424c-4227-9ef5-e09d1df1dd3a@github.com>

On Fri, 13 Sep 2024 03:53:53 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk11u.
> Backport of [JDK-8292867](https://bugs.openjdk.org/browse/JDK-8292867). Applies cleanly.
> 
> Testing:
> 
> - Tier1 passed without new failure on lp4a (release).

LGTM.

-------------

Marked as reviewed by gcao (Committer).

PR Review: https://git.openjdk.org/riscv-port-jdk11u/pull/31#pullrequestreview-2304327628

From duke at openjdk.org  Sat Sep 14 03:30:19 2024
From: duke at openjdk.org (duke)
Date: Sat, 14 Sep 2024 03:30:19 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8292867: RISC-V: Simplify weak
 CAS return value handling
In-Reply-To: <dyBbzq7Pq5DCgJ1f8O56U9jm483nBDlwXUW5fvigvqs=.5d9e59a3-3129-43c2-8f19-cf34f5e539a1@github.com>
References: <dyBbzq7Pq5DCgJ1f8O56U9jm483nBDlwXUW5fvigvqs=.5d9e59a3-3129-43c2-8f19-cf34f5e539a1@github.com>
Message-ID: <3JpLGPdSZr__RXq2c5PSL8WPlyGdcTHeBuq-ORaBk4M=.8a8d3855-0060-4337-94d6-c6f5f9bd5105@github.com>

On Fri, 13 Sep 2024 03:53:53 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk11u.
> Backport of [JDK-8292867](https://bugs.openjdk.org/browse/JDK-8292867). Applies cleanly.
> 
> Testing:
> 
> - Tier1 passed without new failure on lp4a (release).

@DingliZhang 
Your change (at version ebf1e29d243b388e72450fe82ea50b281a072a6c) is now ready to be sponsored by a Committer.

-------------

PR Comment: https://git.openjdk.org/riscv-port-jdk11u/pull/31#issuecomment-2350811671

From fyang at openjdk.org  Sat Sep 14 03:59:18 2024
From: fyang at openjdk.org (Fei Yang)
Date: Sat, 14 Sep 2024 03:59:18 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8292867: RISC-V: Simplify weak
 CAS return value handling
In-Reply-To: <dyBbzq7Pq5DCgJ1f8O56U9jm483nBDlwXUW5fvigvqs=.5d9e59a3-3129-43c2-8f19-cf34f5e539a1@github.com>
References: <dyBbzq7Pq5DCgJ1f8O56U9jm483nBDlwXUW5fvigvqs=.5d9e59a3-3129-43c2-8f19-cf34f5e539a1@github.com>
Message-ID: <tUIjb7-eUJF6qKD8MrphN5ObcmeXLM0AEXL4KSxex-g=.aee4f68e-9528-4bce-aa1c-a8e0451e4e8f@github.com>

On Fri, 13 Sep 2024 03:53:53 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk11u.
> Backport of [JDK-8292867](https://bugs.openjdk.org/browse/JDK-8292867). Applies cleanly.
> 
> Testing:
> 
> - Tier1 passed without new failure on lp4a (release).

Marked as reviewed by fyang (Lead).

-------------

PR Review: https://git.openjdk.org/riscv-port-jdk11u/pull/31#pullrequestreview-2304371798

From dzhang at openjdk.org  Sat Sep 14 07:45:23 2024
From: dzhang at openjdk.org (Dingli Zhang)
Date: Sat, 14 Sep 2024 07:45:23 GMT
Subject: [riscv-port-jdk11u:riscv-port] Integrated: 8292867: RISC-V: Simplify
 weak CAS return value handling
In-Reply-To: <dyBbzq7Pq5DCgJ1f8O56U9jm483nBDlwXUW5fvigvqs=.5d9e59a3-3129-43c2-8f19-cf34f5e539a1@github.com>
References: <dyBbzq7Pq5DCgJ1f8O56U9jm483nBDlwXUW5fvigvqs=.5d9e59a3-3129-43c2-8f19-cf34f5e539a1@github.com>
Message-ID: <ZfAzz7sYnm1X5mcDGf3gg8jPA_spVV8pH80HcpdjxEo=.8c7c6a4b-2a40-4d7d-ac37-39385fb06273@github.com>

On Fri, 13 Sep 2024 03:53:53 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk11u.
> Backport of [JDK-8292867](https://bugs.openjdk.org/browse/JDK-8292867). Applies cleanly.
> 
> Testing:
> 
> - Tier1 passed without new failure on lp4a (release).

This pull request has now been integrated.

Changeset: adc54159
Author:    Dingli Zhang <dzhang at openjdk.org>
Committer: Gui Cao <gcao at openjdk.org>
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/adc54159df18cb53c3a4c24f77939215c8f160c5
Stats:     39 lines in 2 files changed: 2 ins; 13 del; 24 mod

8292867: RISC-V: Simplify weak CAS return value handling

Reviewed-by: gcao, fyang
Backport-of: f57d34242c9b47936d137589fc75ab794d39a9d1

-------------

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/31

From dzhang at openjdk.org  Wed Sep 18 01:20:53 2024
From: dzhang at openjdk.org (Dingli Zhang)
Date: Wed, 18 Sep 2024 01:20:53 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8293050: RISC-V: Remove redundant
 non-null assertions about macro-assembler
Message-ID: <76-sQkWvsE_uPxzxFx9OLSttF64zSDNWtkifM9xXQnk=.3af1c6ef-95bc-4437-b509-be7a46d0af89@github.com>

Please review this backport to riscv-port-jdk17u.
Backport of [JDK-8293050](https://bugs.openjdk.org/browse/JDK-8293050).
Applies not cleanly due to context difference, but it is easy to resolve them manually.

Testing:
- Tier1 passed without new failure on unmatched (release).

-------------

Commit messages:
 - 8293050: RISC-V: Remove redundant non-null assertions about macro-assembler

Changes: https://git.openjdk.org/riscv-port-jdk11u/pull/32/files
  Webrev: https://webrevs.openjdk.org/?repo=riscv-port-jdk11u&pr=32&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8293050
  Stats: 53 lines in 8 files changed: 0 ins; 47 del; 6 mod
  Patch: https://git.openjdk.org/riscv-port-jdk11u/pull/32.diff
  Fetch: git fetch https://git.openjdk.org/riscv-port-jdk11u.git pull/32/head:pull/32

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/32

From gcao at openjdk.org  Wed Sep 18 02:44:19 2024
From: gcao at openjdk.org (Gui Cao)
Date: Wed, 18 Sep 2024 02:44:19 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8293050: RISC-V: Remove
 redundant non-null assertions about macro-assembler
In-Reply-To: <76-sQkWvsE_uPxzxFx9OLSttF64zSDNWtkifM9xXQnk=.3af1c6ef-95bc-4437-b509-be7a46d0af89@github.com>
References: <76-sQkWvsE_uPxzxFx9OLSttF64zSDNWtkifM9xXQnk=.3af1c6ef-95bc-4437-b509-be7a46d0af89@github.com>
Message-ID: <ZHE6ILU5vDHzdFnsxVJCEHDYqXg_5h-ENEuZLtNwi8g=.90c72df7-f951-4d3d-9e8e-20f0ca94dce8@github.com>

On Wed, 18 Sep 2024 01:15:31 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk17u.
> Backport of [JDK-8293050](https://bugs.openjdk.org/browse/JDK-8293050).
> Applies not cleanly due to context difference, but it is easy to resolve them manually.
> 
> Testing:
> - Tier1 passed without new failure on unmatched (release).

Looks good.

-------------

Marked as reviewed by gcao (Committer).

PR Review: https://git.openjdk.org/riscv-port-jdk11u/pull/32#pullrequestreview-2311506851

From fyang at openjdk.org  Wed Sep 18 02:58:27 2024
From: fyang at openjdk.org (Fei Yang)
Date: Wed, 18 Sep 2024 02:58:27 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8293050: RISC-V: Remove
 redundant non-null assertions about macro-assembler
In-Reply-To: <76-sQkWvsE_uPxzxFx9OLSttF64zSDNWtkifM9xXQnk=.3af1c6ef-95bc-4437-b509-be7a46d0af89@github.com>
References: <76-sQkWvsE_uPxzxFx9OLSttF64zSDNWtkifM9xXQnk=.3af1c6ef-95bc-4437-b509-be7a46d0af89@github.com>
Message-ID: <VVF3KlrEOotZYBysd9JnCk-kVI5IU4Qwsuo7cACPQ-I=.765318dd-4390-41f4-b29e-182bf980d0e2@github.com>

On Wed, 18 Sep 2024 01:15:31 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk17u.
> Backport of [JDK-8293050](https://bugs.openjdk.org/browse/JDK-8293050).
> Applies not cleanly due to context difference, but it is easy to resolve them manually.
> 
> Testing:
> - Tier1 passed without new failure on unmatched (release).

Marked as reviewed by fyang (Lead).

-------------

PR Review: https://git.openjdk.org/riscv-port-jdk11u/pull/32#pullrequestreview-2311516670

From duke at openjdk.org  Wed Sep 18 13:30:32 2024
From: duke at openjdk.org (duke)
Date: Wed, 18 Sep 2024 13:30:32 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8293050: RISC-V: Remove
 redundant non-null assertions about macro-assembler
In-Reply-To: <76-sQkWvsE_uPxzxFx9OLSttF64zSDNWtkifM9xXQnk=.3af1c6ef-95bc-4437-b509-be7a46d0af89@github.com>
References: <76-sQkWvsE_uPxzxFx9OLSttF64zSDNWtkifM9xXQnk=.3af1c6ef-95bc-4437-b509-be7a46d0af89@github.com>
Message-ID: <ZAt4Yjj0510_js2dtxCLv5JYysfmBRM1D7BDkG4-BCs=.7fa9c096-6a69-420a-b178-323c11097f8f@github.com>

On Wed, 18 Sep 2024 01:15:31 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk17u.
> Backport of [JDK-8293050](https://bugs.openjdk.org/browse/JDK-8293050).
> Applies not cleanly due to context difference, but it is easy to resolve them manually.
> 
> Testing:
> - Tier1 passed without new failure on unmatched (release).

@DingliZhang 
Your change (at version eb3986c70c227e80e61da3a4b7e3440a7cd6234d) is now ready to be sponsored by a Committer.

-------------

PR Comment: https://git.openjdk.org/riscv-port-jdk11u/pull/32#issuecomment-2358472455

From dzhang at openjdk.org  Thu Sep 19 03:54:57 2024
From: dzhang at openjdk.org (Dingli Zhang)
Date: Thu, 19 Sep 2024 03:54:57 GMT
Subject: [riscv-port-jdk11u:riscv-port] Integrated: 8293050: RISC-V: Remove
 redundant non-null assertions about macro-assembler
In-Reply-To: <76-sQkWvsE_uPxzxFx9OLSttF64zSDNWtkifM9xXQnk=.3af1c6ef-95bc-4437-b509-be7a46d0af89@github.com>
References: <76-sQkWvsE_uPxzxFx9OLSttF64zSDNWtkifM9xXQnk=.3af1c6ef-95bc-4437-b509-be7a46d0af89@github.com>
Message-ID: <upYCwwio2um-6CPrbUijPp3pblrlUm3xAK5-Zq32RMk=.c8dc0157-42f8-472b-86e7-e67773df5a2e@github.com>

On Wed, 18 Sep 2024 01:15:31 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Please review this backport to riscv-port-jdk17u.
> Backport of [JDK-8293050](https://bugs.openjdk.org/browse/JDK-8293050).
> Applies not cleanly due to context difference, but it is easy to resolve them manually.
> 
> Testing:
> - Tier1 passed without new failure on unmatched (release).

This pull request has now been integrated.

Changeset: 120e35ec
Author:    Dingli Zhang <dzhang at openjdk.org>
Committer: Gui Cao <gcao at openjdk.org>
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/120e35ec81814eab5b178c81a3790690b5dd7537
Stats:     53 lines in 8 files changed: 0 ins; 47 del; 6 mod

8293050: RISC-V: Remove redundant non-null assertions about macro-assembler

Reviewed-by: gcao, fyang
Backport-of: 38e670631587853d0f2b5cad48f8ddbce46cecdb

-------------

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/32

From dzhang at openjdk.org  Fri Sep 27 02:56:24 2024
From: dzhang at openjdk.org (Dingli Zhang)
Date: Fri, 27 Sep 2024 02:56:24 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8293474: RISC-V: Unify the way of
 moving function pointer
Message-ID: <p2rbtv-e7If9KVmht-k54dzUxDOvPTZI0Z18fzWcV_g=.77f8d91a-ff61-4ae5-a18b-520ed35ac9cb@github.com>

Please review this backport to riscv-port-jdk11u.
Backport of [JDK-8293474](https://bugs.openjdk.org/browse/JDK-8293474).
Applies not cleanly due to context difference, and changes in `shenandoahBarrierSetAssembler_riscv.cpp` have been modified previously.

Testing:
- Tier1 passed without new failure on lp4a (release).

-------------

Commit messages:
 - 8293474: RISC-V: Unify the way of moving function pointer

Changes: https://git.openjdk.org/riscv-port-jdk11u/pull/33/files
  Webrev: https://webrevs.openjdk.org/?repo=riscv-port-jdk11u&pr=33&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8293474
  Stats: 16 lines in 2 files changed: 2 ins; 8 del; 6 mod
  Patch: https://git.openjdk.org/riscv-port-jdk11u/pull/33.diff
  Fetch: git fetch https://git.openjdk.org/riscv-port-jdk11u.git pull/33/head:pull/33

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/33

From dzhang at openjdk.org  Fri Sep 27 03:09:34 2024
From: dzhang at openjdk.org (Dingli Zhang)
Date: Fri, 27 Sep 2024 03:09:34 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8293524: RISC-V: Use
 macro-assembler functions as appropriate
Message-ID: <-nCeiq-d6VP-4Sregbjsr2cHyhmpDExtGy11RZWtXu8=.612c35b0-8b18-41bd-b9e7-315ad27bd05e@github.com>

Please review this backport to riscv-port-jdk11u.
Backport of [JDK-8293524](https://bugs.openjdk.org/browse/JDK-8293524).
The original patch cannot be directly applied because jdk11u has no [JDK-8241436 ](https://bugs.openjdk.org/browse/JDK-8241436 ) and [JDK-8229258](https://bugs.openjdk.org/browse/JDK-8229258) . Also jdk11u does not have generate_bigIntegerLeftShift and generate_bigIntegerRightShift functions.

-------------

Commit messages:
 - 8293524: RISC-V: Use macro-assembler functions as appropriate

Changes: https://git.openjdk.org/riscv-port-jdk11u/pull/34/files
  Webrev: https://webrevs.openjdk.org/?repo=riscv-port-jdk11u&pr=34&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8293524
  Stats: 76 lines in 12 files changed: 0 ins; 0 del; 76 mod
  Patch: https://git.openjdk.org/riscv-port-jdk11u/pull/34.diff
  Fetch: git fetch https://git.openjdk.org/riscv-port-jdk11u.git pull/34/head:pull/34

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/34

From decodewar at gmail.com  Fri Sep 27 03:37:56 2024
From: decodewar at gmail.com (zifeihan)
Date: Fri, 27 Sep 2024 11:37:56 +0800
Subject: Result: New RISC-V Port Committer: Dingli Zhang
Message-ID: <CAAeyWd_aNXZr2PgfVnY8OFtLXLn4+iYoZP9VtFjkX=+XFP7o8g@mail.gmail.com>

Voting for Dingli Zhang [1] is now closed.

Yes: 3
Veto: 0
Abstain: 0

According to the Bylaws definition of Lazy Consensus, this is sufficient to
approve the nomination.

- Gui Cao

[1]
https://mail.openjdk.org/pipermail/riscv-port-dev/2024-September/001425.html
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From duke at openjdk.org  Fri Sep 27 13:52:50 2024
From: duke at openjdk.org (duke)
Date: Fri, 27 Sep 2024 13:52:50 GMT
Subject: git: openjdk/riscv-port-jdk11u: riscv-port: 4 new changesets
Message-ID: <e1ad2e97-b2e2-4fb6-9bdb-f00e1429a7de@openjdk.org>

Changeset: 0358cbd0
Branch: riscv-port
Author:    Alexey Bakhtin <abakhtin at openjdk.org>
Date:      2024-09-23 14:08:45 +0000
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/0358cbd0a1538937612e3a78ffbfb64d7f4c45a2

8296410: HttpClient throws java.io.IOException: no statuscode in response for HTTP2

Reviewed-by: goetz
Backport-of: f4b140b4200fc0f49161395501d3dbcba7a79059

! src/java.net.http/share/classes/jdk/internal/net/http/Stream.java
+ test/jdk/java/net/httpclient/http2/TrailingHeadersTest.java
! test/jdk/java/net/httpclient/http2/server/BodyOutputStream.java
! test/jdk/java/net/httpclient/http2/server/Http2TestServer.java
! test/jdk/java/net/httpclient/http2/server/Http2TestServerConnection.java

Changeset: b2d38597
Branch: riscv-port
Author:    Goetz Lindenmaier <goetz at openjdk.org>
Date:      2024-09-25 08:06:18 +0000
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/b2d385978fca9eb2fd2eb260a72d727d5f0d6740

Merge


Changeset: dd35f187
Branch: riscv-port
Author:    Antonio <antonio at vieiro.net>
Committer: Severin Gehwolf <sgehwolf at openjdk.org>
Date:      2024-09-26 08:31:17 +0000
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/dd35f187fd038281ce36b986ef71d3b813c0a83e

8340671: GHA: Bump macOS and Xcode versions to macos-12 and XCode 13.4.1

Reviewed-by: sgehwolf

! .github/workflows/build-macos.yml
! .github/workflows/main.yml
! .github/workflows/test.yml

Changeset: cdd69c1e
Branch: riscv-port
Author:    Fei Yang <yangfei at iscas.ac.cn>
Date:      2024-09-27 21:49:36 +0000
URL:       https://git.openjdk.org/riscv-port-jdk11u/commit/cdd69c1e7340f2014eb6525dcf493ff2a6bdd6a1

Merge branch 'master' into riscv-port



From dzhang at openjdk.org  Sun Sep 29 01:56:58 2024
From: dzhang at openjdk.org (Dingli Zhang)
Date: Sun, 29 Sep 2024 01:56:58 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8339741: RISC-V: C ABI breakage
 for integer on stack
Message-ID: <Sude7pSglxcwWWsLVlU8wPcZuK42ujkGWxsZi5M8eGQ=.79a16f85-0da2-4d79-a1d8-3e6da4d75c66@github.com>

Hi all, 

Please review this backport to riscv-port-jdk11u.

Backport of [JDK-8339741](https://bugs.openjdk.org/browse/JDK-8339741).

The original patch cannot be directly applied because jdk11u has no [JDK-8294100](https://bugs.openjdk.org/browse/JDK-8294100).

Testing:
- Tier1 passed without new failure on lp4a (release).
- New jtreg test: test/hotspot/jtreg/compiler/calls/TestManyArgs.java

-------------

Commit messages:
 - 8339741: RISC-V: C ABI breakage for integer on stack

Changes: https://git.openjdk.org/riscv-port-jdk11u/pull/35/files
  Webrev: https://webrevs.openjdk.org/?repo=riscv-port-jdk11u&pr=35&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8339741
  Stats: 156 lines in 4 files changed: 150 ins; 0 del; 6 mod
  Patch: https://git.openjdk.org/riscv-port-jdk11u/pull/35.diff
  Fetch: git fetch https://git.openjdk.org/riscv-port-jdk11u.git pull/35/head:pull/35

PR: https://git.openjdk.org/riscv-port-jdk11u/pull/35

From fyang at openjdk.org  Sun Sep 29 02:36:51 2024
From: fyang at openjdk.org (Fei Yang)
Date: Sun, 29 Sep 2024 02:36:51 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8339741: RISC-V: C ABI
 breakage for integer on stack
In-Reply-To: <Sude7pSglxcwWWsLVlU8wPcZuK42ujkGWxsZi5M8eGQ=.79a16f85-0da2-4d79-a1d8-3e6da4d75c66@github.com>
References: <Sude7pSglxcwWWsLVlU8wPcZuK42ujkGWxsZi5M8eGQ=.79a16f85-0da2-4d79-a1d8-3e6da4d75c66@github.com>
Message-ID: <jPpMcsGEvtYqJzPWjiWPwSGCu5IJ5_mGOR_G50ILkZ0=.8be90d5a-93b3-4362-8428-872f170bb5ba@github.com>

On Sun, 29 Sep 2024 01:50:56 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Hi all, 
> 
> Please review this backport to riscv-port-jdk11u.
> 
> Backport of [JDK-8339741](https://bugs.openjdk.org/browse/JDK-8339741).
> 
> The original patch cannot be directly applied because jdk11u has no [JDK-8294100](https://bugs.openjdk.org/browse/JDK-8294100).
> 
> Testing:
> - Tier1 passed without new failure on lp4a (release).
> - New jtreg test: test/hotspot/jtreg/compiler/calls/TestManyArgs.java

Looks good.

-------------

Marked as reviewed by fyang (Lead).

PR Review: https://git.openjdk.org/riscv-port-jdk11u/pull/35#pullrequestreview-2335680251

From dzhang at openjdk.org  Sun Sep 29 02:58:48 2024
From: dzhang at openjdk.org (Dingli Zhang)
Date: Sun, 29 Sep 2024 02:58:48 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8339741: RISC-V: C ABI
 breakage for integer on stack
In-Reply-To: <Sude7pSglxcwWWsLVlU8wPcZuK42ujkGWxsZi5M8eGQ=.79a16f85-0da2-4d79-a1d8-3e6da4d75c66@github.com>
References: <Sude7pSglxcwWWsLVlU8wPcZuK42ujkGWxsZi5M8eGQ=.79a16f85-0da2-4d79-a1d8-3e6da4d75c66@github.com>
Message-ID: <g4S2h5ksj06Fp-L4VaPbWC_e4K5Cm-iVVj6QS2HTAqk=.305109eb-8539-4bfb-a3a2-3ead71c6cb2d@github.com>

On Sun, 29 Sep 2024 01:50:56 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Hi all, 
> 
> Please review this backport to riscv-port-jdk11u.
> 
> Backport of [JDK-8339741](https://bugs.openjdk.org/browse/JDK-8339741).
> 
> The original patch cannot be directly applied because jdk11u has no [JDK-8294100](https://bugs.openjdk.org/browse/JDK-8294100).
> 
> Testing:
> - Tier1 passed without new failure on lp4a (release).
> - New jtreg test: test/hotspot/jtreg/compiler/calls/TestManyArgs.java

Thanks for the review.

-------------

PR Comment: https://git.openjdk.org/riscv-port-jdk11u/pull/35#issuecomment-2381082472

From duke at openjdk.org  Sun Sep 29 02:58:49 2024
From: duke at openjdk.org (duke)
Date: Sun, 29 Sep 2024 02:58:49 GMT
Subject: [riscv-port-jdk11u:riscv-port] RFR: 8339741: RISC-V: C ABI
 breakage for integer on stack
In-Reply-To: <Sude7pSglxcwWWsLVlU8wPcZuK42ujkGWxsZi5M8eGQ=.79a16f85-0da2-4d79-a1d8-3e6da4d75c66@github.com>
References: <Sude7pSglxcwWWsLVlU8wPcZuK42ujkGWxsZi5M8eGQ=.79a16f85-0da2-4d79-a1d8-3e6da4d75c66@github.com>
Message-ID: <Ir79DSdaaHXjwTZppw0ItTuPHtUbNvbpFtt-OjmzyMg=.ef575f7a-420b-4f9d-8e08-c3f3d120341d@github.com>

On Sun, 29 Sep 2024 01:50:56 GMT, Dingli Zhang <dzhang at openjdk.org> wrote:

> Hi all, 
> 
> Please review this backport to riscv-port-jdk11u.
> 
> Backport of [JDK-8339741](https://bugs.openjdk.org/browse/JDK-8339741).
> 
> The original patch cannot be directly applied because jdk11u has no [JDK-8294100](https://bugs.openjdk.org/browse/JDK-8294100).
> 
> Testing:
> - Tier1 passed without new failure on lp4a (release).
> - New jtreg test: test/hotspot/jtreg/compiler/calls/TestManyArgs.java

@DingliZhang 
Your change (at version b1c913748fbb4b804797645060b9190e3f348033) is now ready to be sponsored by a Committer.

-------------

PR Comment: https://git.openjdk.org/riscv-port-jdk11u/pull/35#issuecomment-2381082893