Shenandoah WB fastpath and optimizations

[Aleksey Shipilev]

On 12/19/2017 04:52 PM, Roland Westrelin wrote:
> 
>> In fact, I wanted to ask you what would it take to teach C2 to emit C1-style check, e.g. instead of:
>>
>>     movzbl 0x3d8(%rTLS), %rScratch  ; read evac-in-progress
>>     test %rScratch, %rScratch
>>     jne EVAC-ENABLED-SLOW-PATH
>>     mov -0x8(%rObj), %rObj          ; read barrier
>>
>> ...do:
>>
>>     cmpb 0x3d8(%TLS), 0             ; read evac-in-progress
>>     jne EVAC-ENABLED-SLOW-PATH
>>     mov -0x8(%rObj), %rObj          ; read barrier
>>
>> ...thus freeing up the register?
> 
> This?
> 
> diff --git a/src/hotspot/cpu/x86/x86_64.ad b/src/hotspot/cpu/x86/x86_64.ad
> --- a/src/hotspot/cpu/x86/x86_64.ad
> +++ b/src/hotspot/cpu/x86/x86_64.ad
> @@ -2966,6 +2966,16 @@
>    interface(CONST_INTER);
>  %}
>  
> +operand immU8()
> +%{
> +  predicate(0 <= n->get_int() && (n->get_int() <= 255));
> +  match(ConI);
> +
> +  op_cost(5);
> +  format %{ %}
> +  interface(CONST_INTER);
> +%}
> +
>  operand immI16()
>  %{
>    predicate((-32768 <= n->get_int()) && (n->get_int() <= 32767));
> @@ -11729,6 +11739,18 @@
>    ins_pipe(ialu_cr_reg_imm);
>  %}
>  
> +instruct compUB_mem_imm(rFlagsReg cr, memory op1, immU8 op2)
> +%{
> +  match(Set cr (CmpI (LoadUB op1) op2));
> +
> +  ins_cost(125);
> +  format %{ "cmpb    $op1, $op2" %}
> +  ins_encode %{
> +    __ cmpb($op1$$Address, $op2$$constant);
> +  %}
> +  ins_pipe(ialu_cr_reg_mem);
> +%}
> +
>  //----------Max and Min--------------------------------------------------------
>  // Min Instructions

Yup, it codegens what we want. It does not help performance though, but I have another idea...

-Aleksey