RFR: Several C1 cleanups
Roman Kennke
rkennke at redhat.com
Tue Jul 10 20:34:13 UTC 2018
This is a big C1 cleanup. It's based on the previous WB consolidation
and related cleanups from yesterday and today.
- Several intrinsics and instructions now do the barrier in the assembly
path, as opposed to the LIR. Especially in the arraycopy intrinsic, this
means we don't have to mess with the fixed registers, and can revert a
whole bunch of code to upstream version.
- For monitor-enter 'instruction' I moved the barriers to assembler too,
mostly because it's easier to deal with than C1. I don't really care
much. If we were to keep it in LIR, we can make it always null-checking
instead of the complicated paths we have now (monitorenter must always
be null-checking).
- We need to keep the barriers for CRC32 intrinsics in LIR, because the
address is built there, and we don't get to see the base oop in assembly
anymore. I cleaned it up a little though.
- This means we need null-checking WB in assembly. I added this.
- Removed some leftovers in some places
- Added some testcases to check which instructions/intrinsic actually
require null-checking.
Testing: tier3_gc_shenandoah fastdebug/release x86/aarch64 some specjbb
under c1-only
http://cr.openjdk.java.net/~rkennke/c1cleanup/webrev.00/
Ok?
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