RFR: In ASM SATB barrier, mov pre_val to c_rarg0 before call early, to protect c_rarg1

[Roman Kennke]

This re-does Roland's previous patch.

If pre_val == c_rarg1, we need to move it to c_rarg0 early, otherwise it
would get trashed by 'pushing' the thread register into c_rarg1. And
since we need it in c_rarg0 anyway, we can do so unconditionally, unless
it already is c_rarg0 already, in which case we don't need to do anything.

The difference to Roland's patch is that this moves the register
shuffling directly before the call, where it would not mess with other
registers that might still be needed. (practically speaking, it would
swap the two register moves in call prologue:

before:
mov(c_rarg1, thread);  // smashes pre_val when pre_val==c_rarg1
mov(c_rarg0, pre_val);

after:
mov(c_rarg0, pre_val); // thread cannot be in c_rarg0
mov(c_rarg1, thread);  // ok now

It passes the workload that failed before. Unfortunately I couldn't come
up with a testcase, because it's tricky to get C1 to compile it with
exactly the required set of registers to make it fail.

Testing: failing workload. tier3_gc_shenandoah

http://cr.openjdk.java.net/~rkennke/c1-satb-regs/webrev.00/

Ok?

Roman