RFR: 8293351: Add second tmp register to aarch64 BarrierSetAssembler::load_at

[Fei Yang]

On Mon, 5 Sep 2022 10:09:09 GMT, Axel Boldt-Christmas <aboldtch at openjdk.org> wrote:

> Add a second tmp register to the BarrierSetAssembler::load_at GC API for aarch64.
> 
> Today G1 and Shenandoah uses a second temporary register. This will also be the case for generational ZGC.
> 
> Testing: Oracle platforms tier 1-3

src/hotspot/cpu/aarch64/macroAssembler_aarch64.cpp line 2466:

> 2464: #endif
> 2465: 
> 2466: void MacroAssembler::resolve_jobject(Register value, Register tmp1, Register tmp2) {

You might want to rename the second parameter for its declaration in file macroAssembler_aarch64.hpp

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PR: https://git.openjdk.org/jdk/pull/10161