RFR: 8293351: Add second tmp register to aarch64 BarrierSetAssembler::load_at [v3]

[Hao Sun]

On Mon, 5 Sep 2022 14:57:32 GMT, Axel Boldt-Christmas <aboldtch at openjdk.org> wrote:

>> Add a second tmp register to the BarrierSetAssembler::load_at GC API for aarch64.
>> 
>> Today G1 and Shenandoah uses a second temporary register. This will also be the case for generational ZGC.
>> 
>> Testing: Oracle platforms tier 1-3
>
> Axel Boldt-Christmas has updated the pull request incrementally with one additional commit since the last revision:
> 
>   Fix argument name

src/hotspot/cpu/aarch64/gc/g1/g1BarrierSetAssembler_aarch64.hpp line 48:

> 46:                             Register pre_val,
> 47:                             Register thread,
> 48:                             Register tmp,

It would be better to use `tmp1` as the definition site does.

-------------

PR: https://git.openjdk.org/jdk/pull/10161