RFR: 8293351: Add second tmp register to aarch64 BarrierSetAssembler::load_at [v5]

[Axel Boldt-Christmas]

On Tue, 6 Sep 2022 12:06:38 GMT, Axel Boldt-Christmas <aboldtch at openjdk.org> wrote:

>> Add a second tmp register to the BarrierSetAssembler::load_at GC API for aarch64.
>> 
>> Today G1 and Shenandoah uses a second temporary register. This will also be the case for generational ZGC.
>> 
>> Testing: Oracle platforms tier 1-3
>
> Axel Boldt-Christmas has updated the pull request incrementally with two additional commits since the last revision:
> 
>  - Push r10 using push and pop
>  - Fix Argument Comments

@shqking @stooart-mon Your feedback have been addressed with code changes. Is there anything more you would like to add?
@tschatzl @theRealAph @RealFYang The only change since your approval has been to change comments and argument names, as well as changed from `stp/ldp` to `push/pop` with `RegSet` for correctness.

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PR: https://git.openjdk.org/jdk/pull/10161