RFR: 8293769: RISC-V: Add a second temporary register for BarrierSetAssembler::load_at

[Fei Yang]

This is similar to https://bugs.openjdk.org/browse/JDK-8293351
Add a second temporary register for BarrierSetAssembler::load_at GC API on riscv64.
Today G1 and Shenandoah uses a second temporary register. This will also be the case for generational ZGC.

Testing: Tier1-3 tested on Linux-riscv64 SiFive Unmatched board.

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Commit messages:
 - 8293769: RISC-V: Add a second temporary register for BarrierSetAssembler::load_at

Changes: https://git.openjdk.org/jdk/pull/10261/files
 Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=10261&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8293769
  Stats: 327 lines in 13 files changed: 9 ins; 108 del; 210 mod
  Patch: https://git.openjdk.org/jdk/pull/10261.diff
  Fetch: git fetch https://git.openjdk.org/jdk pull/10261/head:pull/10261

PR: https://git.openjdk.org/jdk/pull/10261