Integrated: 8338881: GenShen: Use explicit third temp register for post barrier
William Kemper
wkemper at openjdk.org
Mon Aug 26 20:49:26 UTC 2024
On Fri, 23 Aug 2024 17:06:56 GMT, William Kemper <wkemper at openjdk.org> wrote:
> * Use register given as `tmp3` argument instead of "out of the blue" `r3`
> * Simplify logic for post barrier call
>
> ## Testing
> GHA, internal pipelines
This pull request has now been integrated.
Changeset: 12af9f62
Author: William Kemper <wkemper at openjdk.org>
URL: https://git.openjdk.org/shenandoah/commit/12af9f629ab2f3d29392eb8e6ab2abd518723480
Stats: 19 lines in 1 file changed: 5 ins; 13 del; 1 mod
8338881: GenShen: Use explicit third temp register for post barrier
Reviewed-by: shade
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PR: https://git.openjdk.org/shenandoah/pull/486
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