RFR: 8332082: Shenandoah: Use SATB active flag for C2 pre-write barrier on x86 and PPC

[Aleksey Shipilev]

On Fri, 10 May 2024 16:13:51 GMT, William Kemper <wkemper at openjdk.org> wrote:

> This is consistent with c1 and other platforms.

Hold on. Here is the C2 SATB barrier check, which checks gc-state for `MARKING`:
https://github.com/openjdk/jdk/blob/2f10a316ff0c5a4c124b94f6fabb38fb119d2c82/src/hotspot/share/gc/shenandoah/c2/shenandoahBarrierSetC2.cpp#L241-L243

What this PR changes is `ShenandoahBarrierSetAssembler::satb_write_barrier_impl`, which is the SATB barrier for generic assembly code. Yes, some of that may be reached from C2.

Looking around, I see that C1 AArch64, RISC-V, x86 `ShenandoahBarrierSetAssembler::generate_c1_pre_barrier_runtime_stub`-s use `gc_state == MARKING` too:
https://github.com/openjdk/jdk/blob/2f10a316ff0c5a4c124b94f6fabb38fb119d2c82/src/hotspot/cpu/aarch64/gc/shenandoah/shenandoahBarrierSetAssembler_aarch64.cpp#L695-L698
https://github.com/openjdk/jdk/blob/2f10a316ff0c5a4c124b94f6fabb38fb119d2c82/src/hotspot/cpu/riscv/gc/shenandoah/shenandoahBarrierSetAssembler_riscv.cpp#L642-L646
https://github.com/openjdk/jdk/blob/2f10a316ff0c5a4c124b94f6fabb38fb119d2c82/src/hotspot/cpu/x86/gc/shenandoah/shenandoahBarrierSetAssembler_x86.cpp#L226-L228

It looks to me the current status is:

* Assembler:
  - AArch64, RISC-V: SATBMarkQueue.isActive
  - x86, PPC: gc_state == MARKING
* C1 (IR):
  - All platforms: SATBMarkQueue.isActive
* C1 (assembler stub):
  - All platforms: gc_state == MARKING
* C2 (IR):
  - All platforms: gc-state == MARKING

So, are we better off going the other way around, towards gc-state == MARKING? This would "only" need to rewrite AArch64, RISC-V parts in assembler, and shared C1 barrier part.

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PR Comment: https://git.openjdk.org/jdk/pull/19180#issuecomment-2111971770