Integrated: 8338881: GenShen: Use explicit third temp register for post barrier

Mon Sep 16 20:52:26 UTC 2024

On Mon, 16 Sep 2024 19:54:58 GMT, William Kemper <wkemper at openjdk.org> wrote:

> Conflict with IU barrier support in 21.

This pull request has now been integrated.

Changeset: 324b9129
Author:    William Kemper <wkemper at openjdk.org>
URL:       https://git.openjdk.org/shenandoah-jdk21u/commit/324b912979ebda01f20c67f23c8bc0d7517772cd
Stats:     1 line in 1 file changed: 0 ins; 0 del; 1 mod

8338881: GenShen: Use explicit third temp register for post barrier

Reviewed-by: kdnilsen
Backport-of: 12af9f629ab2f3d29392eb8e6ab2abd518723480

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PR: https://git.openjdk.org/shenandoah-jdk21u/pull/97