RFR: Update code location decoding for aarch64

[Jie He]

Jdk/tsan uses a 64-bit value to identify the code location info. The
lowest 16-bit for bci, the next 44-bit for method id, and the highest 4
bits are reserved for internal purpose. 44 bits with 8 bytes alignment
could represent 47-bit address space. It's sufficient for x86, but not
for aarch64 whose heap address needs 48-bit in most cases.

According to current tsan memory mapping, method id on aarch64 could be
allocated only in 3 memory regions, which highest 12 bits are fixed, they
are 0x0, 0xaaa and 0xfff respectively. We could use it to distinguish
which space the method id comes from.

After code location encoding in tsan_code_location(), the MSB of the
id will be overwritten, but we can restore it in decoding function because
we know the memory range the id is allocated to.

It won't impact the performance. The decoding function is only called
when need to report a race.

I found the issue after enabled object field related instruments.

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Commit messages:
 - Update code location decoding for aarch64

Changes: https://git.openjdk.java.net/tsan/pull/10/files
 Webrev: https://webrevs.openjdk.java.net/tsan/10/webrev.00
  Stats: 17 lines in 1 file changed: 14 ins; 0 del; 3 mod
  Patch: https://git.openjdk.java.net/tsan/pull/10.diff
  Fetch: git fetch https://git.openjdk.java.net/tsan pull/10/head:pull/10

PR: https://git.openjdk.java.net/tsan/pull/10