Aligned long views over byte arrays and heap ByteBuffers

Vitaly Davidovich vitalyd at gmail.com
Fri Jan 15 13:38:57 UTC 2016


Hey Paul,

That should be possible if alignment behaviour is always guaranteed on
> hardware supporting platforms.


The check could be (a) are arrays 8-byte aligned and (b) if not, does the
platform support unaligned accesses.  I'm not fully certain what type of
"atomic" accesses you guys are referring to, but given Aleksey mentioned
CAS, I'm assuming it's atomic instructions rather than CPU atomic accesses
(e.g. Intel uses the term "atomic" to also talk about ordinary accesses to
memory, which boils down to "does the read stay within a single
cacheline").  In that case, some hardware does support unaligned atomic
instructions (e.g. Intel modern cpus' LOCK prefix and cmpxchg do allow
unaligned addresses), albeit they'll likely execute slower but probably
faster than software emulation.

I suppose part (b) may not be that important, at least for Hotspot
purposes, since 32-bit Hotspot is likely a small fraction of deployments.
But once you have the software emulation fallback, you (or other vendors)
could extend the checks to cover (b) or whatever else is relevant.


On Fri, Jan 15, 2016 at 4:28 AM, Paul Sandoz <paul.sandoz at oracle.com> wrote:

> Hi Vitaly,
>
> That should be possible if alignment behaviour is always guaranteed on
> hardware supporting platforms.
>
> It would mean that all atomic accesses should go through the handle such
> that on software supported platforms a lock can be used, which IIUC is kind
> of similar to Unsafe behaviour.
>
> Thanks,
> Paul.
>
> > On 15 Jan 2016, at 00:58, Vitaly Davidovich <vitalyd at gmail.com> wrote:
> >
> > Is it possible to detect at runtime whether arrays are 8-byte aligned
> (i.e.
> > 64 or 32 bit VM) and then change how long accesses via VarHandle
> operate? I
> > suppose on 32-bit you'd have to do the access in software vs hardware
> > instructions, but as you say, 32bit JVMs (at least Hotspot) aren't common
> > these days.
> >
>
>


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