[lworld] RFR: 8376059: [lworld] Aarch64: StoreLSpecial with 1 oop does not save register in pre-barrier

[Quan Anh Mai]

Hi,

Many thanks to @stefank for finding the issue and helping investigating it. This PR fixes a couple of issues:

- `g1StoreLSpecialOneOop` does not save `mem` and `src` during the GC pre-barrier, this risks clobber these values, which may lead to crashes or memory corruption when doing the store instruction.
- It seems that the value passed to the post-barrier should be an uncompressed oop, this requires us to decode the narrow oop instead of simply zero-extending it.
- Relax the restriction on the `src` register to be an arbitrary register.
- Split the rule into 2 so that we can avoid cloberring an additional register when the offset of the oop inside the payload is 0.

Testing:
- [x] tier1, linux-aarch64, with `-XX:+StressGCM -XX:InitiatingHeapOccupancyPercent=0 -Xmn10m`
- [ ] tier1-4, valhalla-comp-stress, linux-aarch64
- [ ] tier1-4, valhalla-comp-stress, linux-aarch64, with `-XX:+StressGCM -XX:InitiatingHeapOccupancyPercent=0 -Xmn10m`

Please take a look and leave your reviews, thanks a lot.

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Commit messages:
 - Missing preserve register for g1StoreLSpecialOneOop

Changes: https://git.openjdk.org/valhalla/pull/2013/files
  Webrev: https://webrevs.openjdk.org/?repo=valhalla&pr=2013&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8376059
  Stats: 64 lines in 2 files changed: 45 ins; 4 del; 15 mod
  Patch: https://git.openjdk.org/valhalla/pull/2013.diff
  Fetch: git fetch https://git.openjdk.org/valhalla.git pull/2013/head:pull/2013

PR: https://git.openjdk.org/valhalla/pull/2013