RFR: JDK-8214527 AArch64: ZGC for Aarch64

Stuart Monteith stuart.monteith at linaro.org
Fri May 17 14:28:58 UTC 2019


Hello,
   This patch implements ZGC for AArch64. Unlike the previous set of
patches, this duplicates the x86 multimapping scheme rather than using
the Aarch64 TBI feature, where the top 8 bits are ignored by the
hardware. I didn't measure any conclusive performance problems using
multimapping. It would necessitate changes to SA, JNI, and wasn't
going to be compatible with Graal or JVMCI in general until they were
also able to switch to 64-bit literals dynamically. In addition, there
are up and coming features in the AArch64 architecture that exploit
the TBI area that we should keep open, such as MTE (Memory Tagging
Extensions) that open the door to lightweight hardware ASAN. With MTE
using 4 of the 8 bits, and ZGC and MTE perhaps needing more than 4
bits, future conflict looks likely.

JTreg testing hasn't demonstrated any significant differences from x86
ZGC in my testing.

The behaviour should be the same as is expected from x86_64, including
for the behaviour with command line arguments. Currently ZGC requires
-XX:+UnlockExperimentalVMOptions, that should be the case for AArch64
this release. If x86_64 were to do have ZGC designated as not
experimental, we must ensure it still applies for ZGC on AArch64.

The associated bug is:
    https://bugs.openjdk.java.net/browse/JDK-8214527
The patchset is:
      http://cr.openjdk.java.net/~smonteith/8214527/webrev.0/

There is a patch contributed by Roland Westerlin required for fixing
memory barriers,
  http://cr.openjdk.java.net/~smonteith/zgc-mm/20190430/membar/
I'll follow up with a separate RFR patch to address that.

Thanks,
   Stuart


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