RFR: 8216557 Aarch64: Add support for Concurrent Class Unloading
stumon01 at arm.com
Thu Mar 26 22:42:08 UTC 2020
Please review this change to implement nmethod entry barriers on
aarch64, and hence concurrent class unloading with ZGC. Shenandoah will
need to be separately tested and enabled - there are problems with this
It has been tested with JTreg, runs with SPECjbb, gcbench, and Lucene as
well as Netbeans.
In terms of interesting features:
With nmethod entry barriers, immediate oops are removed by:
LIR_Assembler::jobject2reg and MacroAssembler::movoop
This is to ensure consistency with the entry barrier, as otherwise with
an immediate we'd otherwise need an ISB.
I've added "-XX:DeoptNMethodBarrierALot". I found this functionality
useful in testing as deoptimisation is very infrequent. I've written it
as an atomic to avoid it happening too frequently. As it is a new
option, I'm not sure whether any more is needed than this review. A new
test has been added
test GC with that option enabled.
This method emits the barrier code. In internal review it was suggested
the "dmb( ISHLD )" should be replaced by "membar(LoadLoad)". I've not
done this as the BarrierSetNMethod code checks the exact instruction
sequence, and I prefer to be explicit.
Benchmarking method entry shows an increase of around 6ns with the
nmethod entry barrier.
The deoptimisation code was contributed by Andrew Haley.
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