More on memory barriers
aph at redhat.com
Tue Sep 16 07:38:23 UTC 2014
On 15/09/14 20:44, Dean Long wrote:
> If volatile store uses AArch64 "stlr" and volatile load uses "ldar",
> then is that enough (no additional barriers, including StoreLoad,
> required)? That's my understanding from the comments in
> orderAccess.hpp regarding ia64 st.rel and ld.acq.
Not quite: we'd still need a StoreLoad even after a stlr.
I don't think I can use stlr without making changes to C2. My problem
is that MemBar nodes are emitted in places where they are needed
(e.g. after an object is created) and places where they are not needed
(e.g. before a volatile store) and in the back end I can't tell which
is which. Ideally there would be more barrier types, and then I could
use stlr, but at the moment I emit barriers.
In practice I'm not sure that it makes any difference. Code density
is about the same with separate barriers because store release
instructions have a much more restricted set of addressing modes.
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