[jmm-dev] bitwise RMW operators, specifically testAndSetBit/BTS

Doug Lea dl at cs.oswego.edu
Mon Jul 25 19:24:48 UTC 2016

On 07/25/2016 02:19 PM, Hans Boehm wrote:

> 1. Opaque is cache coherent (i.e. single-variable sequentially consistent), just
> like memory_order_relaxed in C++.
> 2. Opaque prevents compiler merging of accesses,
> In my mind, (2) is separable from coherence.

This might not be the right venue to discuss whether the new C++17 sec 1.10.4
progress requirements apply to the memory system. I think they must, and
that this would be consistent with common formal cache-memory-system specs.

In which case you are inevitably led to the no-merge rule, as seen in the
examples I posted.

And even if this were not done in C++, I don't know any argument for
not doing so in Java. No programmer would be happy if their bounded
spin loops were allowed to be transformed into no-ops. Why allow
something that literally no one wants rather than just hoping that
compilers don't happen to do it?

(Gratuitously editorializing, one would think that in C++,
it might also be popular to adopt this interpretation, and
eliminate the need to ever integrate C "volatile", or to
re-spec consume mode.)


More information about the jmm-dev mailing list