[jmm-dev] Store completion query - general and ARM
aph at redhat.com
Thu Nov 10 09:07:15 UTC 2016
On 10/11/16 00:06, David Holmes wrote:
> Does any part of the JMM require actual visibility/completion of
> volatile stores or is it only order that is defined (with an assumptions
> that all stores will complete in a finite time)?
Ordering is really all that we've got: all that memory fences can do
is ensure that visibility of loads and stores is ordered in some way.
> In relation to ARM specifically, Dekker style algorithms require
> visibility/completion of the store before the subsequent load, yet the
> example in "A Tutorial Introduction to the ARM and POWER Relaxed Memory
> Models" shows the use of DMB, not DSB.
DMB is fine for that. Dekker doesn't need a store to be forced out of
the caches, only that the store be made visible to other processors
before any operations later in program order.
> Yet AFAICS DMB says nothing about completion whereas DSB does. ??
> (To be honest I find the Group A/B description of DMB properties
> extremely hard to actually interpret wrt code like Dekker.)
DSB is only really needed if there are multiple caches of the same
address, i.e. Icache and Dcache: it's necessary to force a store out
into main memory in order to refresh he Icache.
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