[8u] RFR: aarch32: change in ldrd/strd macrosses required for implicit null check

[Fedor Burdun]

Hi All,

Let me ask you for review the patch that is one of prerequisites for C1.

The problem is in calculating the offset where SIGSEGV that should be turned into NPE can happen.

Before introducing ldrd/strd macrosses in macroAssembler we could rely on code_offset() saved before emitting load/store operation.
However now in case several address modes ldrd/strd macrosses will emit an additional instruction resolving address before real load/store.

The code offset where implicit NPE can happen now can be calculated by sum of code_offset() and value returned by ldrd/strd macrosess.

This patch doesn't change template interpreter's behaviour, so I've tested only build in core configuration.

Thanks,
Fedor
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