[8u] RFR: aarch32: change in ldrd/strd macrosses required for implicit null check

[Edward Nevill]

On Wed, 2016-03-16 at 15:30 +0000, Fedor Burdun wrote:
> Hi All,
> 
> Let me ask you for review the patch that is one of prerequisites for C1.
> 
> The problem is in calculating the offset where SIGSEGV that should be turned into NPE can happen.
> 
> Before introducing ldrd/strd macrosses in macroAssembler we could rely on code_offset() saved before emitting load/store operation.
> However now in case several address modes ldrd/strd macrosses will emit an additional instruction resolving address before real load/store.
> 
> The code offset where implicit NPE can happen now can be calculated by sum of code_offset() and value returned by ldrd/strd macrosess.
> 
> This patch doesn't change template interpreter's behaviour, so I've tested only build in core configuration.

Hi Fedor,

Thanks for this.

Rather than returning 0, or 4 and then adding that into code_offset()
would it be more consistent to return the offset as is done in other
cases.

For example

int MacroAssembler::load_unsigned_short(Register dst, Address src) {
  int off = offset();
  ldrh(dst, src);
  return off;
}

Here it returns the offset, rather than some delta on the offset.

This would seem to me to make it more consistent and easier to read.

I also wonder about calling them ldrd/strd as anyone reading the code
would be forgiven for thinking that they emit an ldrd/strd instruction
rather than possibly an ldrd/strd, but possibly an ldm/stm or
alternatively a pair of ldr/str with also some possible adjustment
beforehand. Would names like load_double_word and store_double_word be
more appropriate?

I appreciate that you were not responsible for the original choice of
name.

All the best,
Ed.