[aarch64-port-dev ] RFR (S): 8209193: Fix aarch64-linux compilation after -Wreorder changes

[Aleksey Shipilev]

Hi Thomas,

On 08/10/2018 03:32 PM, Thomas Schatzl wrote:
>   when crosscompiling to aarch64-linux I found the following errors
> caused by latest -Wreorder changes.

Oh yes, many build configs appear broken, see build logs here:
  https://builds.shipilev.net/openjdk-jdk/

> It would be nice if aarch64 devs could verify; I cc'ed aarch64 port dev
> ml, but I do not know if this is the right list for this.

It is! Red Hat AArch64 people are off this week.

> CR:
> https://bugs.openjdk.java.net/browse/JDK-8209193
> Webrev:
> http://cr.openjdk.java.net/~tschatzl/8209193/webrev/

This patch seems to resolve aarch64 build issues for me.

I have only minor stylistic comments, these can be fixed before the push without another review.

*) assembler_aarch64.hpp, L403, indenting if a bit off:

 401     : _base(r), _index(noreg), _offset(0), _mode(base_plus_offset), _target(0) { }
 402   Address(Register r, int o)
 403     :  _base(r), _index(noreg), _offset(o), _mode(base_plus_offset), _target(0) { }
 404   Address(Register r, long o)
 405     : _base(r), _index(noreg), _offset(o), _mode(base_plus_offset), _target(0) { }
 406   Address(Register r, unsigned long o)
 407     : _base(r), _index(noreg), _offset(o), _mode(base_plus_offset), _target(0) { }

*) assembler_aarch64.hpp, L414, L419 -- indenting a bit off, the initializer list should start with
a few additional spaces, like L422 does it:

 412   Address(Register r, Register r1, extend ext = lsl())
 413     : _base(r), _index(r1),  _offset(0), _mode(base_plus_offset_reg),
 414     _ext(ext), _target(0) { }
 415   Address(Pre p)
 416     : _base(p.reg()), _offset(p.offset()), _mode(pre) { }
 417   Address(Post p)
 418     : _base(p.reg()),  _index(p.idx_reg()), _offset(p.offset()),
 419     _mode(p.idx_reg() == NULL ? post : post_reg),  _target(0) { }
 420   Address(address target, RelocationHolder const& rspec)
 421     : _mode(literal),
 422       _rspec(rspec),
 423       _is_lval(false),
 424       _target(target)  { }

*) assembler_aarch64.hpp: stray whitespace before _target, _offset, _index:

 413     : _base(r), _index(r1),  _offset(0), _mode(base_plus_offset_reg),
...
 418     : _base(p.reg()),  _index(p.idx_reg()), _offset(p.offset()),
 419     _mode(p.idx_reg() == NULL ? post : post_reg),  _target(0) { }


Thanks,
-Aleksey