[aarch64-port-dev ] RFR(S): 8204473 - AARCH64: register post-index addressing mode is not supported directly

[Andrew Haley]

On 06/06/2018 05:59 PM, Dmitrij Pochepko wrote:
> Ahh, sorry. Missed single existing [ab]usage of such addressing in 
> fastdebug mode: 

Mmm.  It's always a really, really good idea to run tests with
assertions enabled.

> http://hg.openjdk.java.net/jdk/jdk/file/tip/src/hotspot/cpu/aarch64/assembler_aarch64.cpp#l1179
>
> However, there is a confusing comment there: "// BEGIN  Generated code 
> -- do not edit // Generated by aarch64-asmtest.py"
> What should we do about it? I don't see aarch64-asmtest.py to edit.

Oh yes.  It must not have been included when we merged into mainline.
Oops.

> Do we need to edit this smoke test directly despite this comment?

Yes, please.  The code you need to edit is *after* the line
END  Generated code -- do not edit

I did this:

  address PC = __ pc();
  __ ld1(v0, __ T16B, Address(r16)); // No offset
  __ ld1(v0, __ T16B, __ post(r16, 8)); // Post-index
  __ ld1(v0, __ T16B, __ post(r16, r17)); //

which at least checks that we can generate the instructions, for which
I get

  0x000003ffa1000764: ld1	{v0.16b}, [x16]
  0x000003ffa1000768: ld1	{v0.16b}, [x16], #16
  0x000003ffa100076c: ld1	{v0.16b}, [x16], x17

That "#16" looks odd.  Presumably there's some scaling going on there.
Do you know?

-- 
Andrew Haley
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
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