[aarch64-port-dev ] AArch64: Why should we use rscratch1 instead of the temp register passed in?

[Pengfei Li (Arm Technology China)]

Hi,

I'm currently working on adding the missing div/rem by power-of-2 optimization in C1 AArch64 backend. JBS: https://bugs.openjdk.java.net/browse/JDK-8210413

I see 5 years ago, Roman added a TODO comment [1] at http://hg.openjdk.java.net/jdk/jdk/file/bbc7157ad9c5/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp#l1035 saying
>  TODO: For some reason, using the Rscratch that gets passed in is
>  not possible because the register allocator does not see the tmp reg
>  as used, and assigns it the same register as Rdividend. We use rscratch1
>  instead.

So I was wondering why register allocator also assigns the temp register to the dividend. Is there any special handling for LIR_Op3 in C1 linear scan?
I appreciate your help.

--
Thanks,
Pengfei

[1] http://hg.openjdk.java.net/aarch64-port/jdk8u/hotspot/rev/3aafc60e8f34#l2.7