[aarch64-port-dev ] AArch64: Why should we use rscratch1 instead of the temp register passed in?

[Roman Kennke]

> Hi,
> 
> I'm currently working on adding the missing div/rem by power-of-2 optimization in C1 AArch64 backend. JBS: https://bugs.openjdk.java.net/browse/JDK-8210413
> 
> I see 5 years ago, Roman added a TODO comment [1] at http://hg.openjdk.java.net/jdk/jdk/file/bbc7157ad9c5/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp#l1035 saying
>>  TODO: For some reason, using the Rscratch that gets passed in is
>>  not possible because the register allocator does not see the tmp reg
>>  as used, and assigns it the same register as Rdividend. We use rscratch1
>>  instead.
> 
> So I was wondering why register allocator also assigns the temp register to the dividend. Is there any special handling for LIR_Op3 in C1 linear scan?
> I appreciate your help.



Hmm, I am not sure.

Here:
http://hg.openjdk.java.net/jdk/jdk/file/bbc7157ad9c5/src/hotspot/cpu/aarch64/c1_LIRAssembler_aarch64.cpp#l1035

.. the opr3 is marked as 'temp' (if it's assigned a valid value) which
means it should be live for the lifetime of the instruction, but not
before or after it. Maybe that comment is obsolete? Have you tried to
use opr3/Rscratch ?

Roman