RFR: 8284949: riscv: Add Zero support for the 32-bit RISC-V architecture [v2]

[Feilong Jiang]

> This patch adds Zero support for the 32-bit RISC-V architecture.
> 
> Additional tests:
> 
> - [x] Linux zero RISCV32 cross-compilation
> - [x] Resulting binaries run on QEMU User mode without problems

Feilong Jiang has updated the pull request incrementally with one additional commit since the last revision:

  adjust SYS_futex define for RISCV32

-------------

Changes:
  - all: https://git.openjdk.java.net/jdk/pull/8284/files
  - new: https://git.openjdk.java.net/jdk/pull/8284/files/a26633b2..dae310f9

Webrevs:
 - full: https://webrevs.openjdk.java.net/?repo=jdk&pr=8284&range=01
 - incr: https://webrevs.openjdk.java.net/?repo=jdk&pr=8284&range=00-01

  Stats: 2 lines in 1 file changed: 0 ins; 0 del; 2 mod
  Patch: https://git.openjdk.java.net/jdk/pull/8284.diff
  Fetch: git fetch https://git.openjdk.java.net/jdk pull/8284/head:pull/8284

PR: https://git.openjdk.java.net/jdk/pull/8284