RFR: 8284949: riscv: Add Zero support for the 32-bit RISC-V architecture [v2]
Thomas Stuefe
stuefe at openjdk.java.net
Tue Apr 19 11:26:25 UTC 2022
On Tue, 19 Apr 2022 08:47:18 GMT, Feilong Jiang <fjiang at openjdk.org> wrote:
>> This patch adds Zero support for the 32-bit RISC-V architecture.
>>
>> Additional tests:
>>
>> - [x] Linux zero RISCV32 cross-compilation
>> - [x] Resulting binaries run on QEMU User mode without problems
>
> Feilong Jiang has updated the pull request incrementally with one additional commit since the last revision:
>
> adjust SYS_futex define for RISCV32
LGTM
Cheers, Thomas
P.S. I assume you did not run the whole gamut of jtreg tests, right? Seems to me there are a number of tests which would need to get adapted for riscv32.
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Marked as reviewed by stuefe (Reviewer).
PR: https://git.openjdk.java.net/jdk/pull/8284
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