RFR: 8320500: [vectorapi] RISC-V: Optimize vector math operations with SLEEF [v4]

[Fei Yang]

On Tue, 24 Sep 2024 19:09:29 GMT, Hamlin Li <mli at openjdk.org> wrote:

>> Then why would we put a constraint on the number of supported argument vector registers here (v8-v15 instead of v8-v23)? Could we just support all of them, i.e., v8-v23 to comply with the RISC-V psABI?
>
> There is no strong reason, just it's sufficient for current implementation.
> 
> Maybe it's better to use them all in case in the future some other code touch the limit unnecessarily. I'll change it to use all arg v regs.

Thanks for the update. Glad to see it's now fully compliant with the new calling convention variant of RISC-V psABI. I think the code will be easier for others to understand at the same time.

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PR Review Comment: https://git.openjdk.org/jdk/pull/21083#discussion_r1774302338