[sw-dev] Project proposal: RISC-V port

Andrew Haley aph at redhat.com
Thu Feb 8 18:23:58 UTC 2018

On 08/02/18 17:20, Bruce Hoult wrote:
> Having been involved in porting Microsoft's CoreCLR JIT to ARM (for Tizen
> 4.0) I'd say that's an underestimate, unless OpenJDK is somehow far better
> written.

We have done it before.  It's a lower bound.

Mind you, unless there's some real hardware available it'll take a lot
longer.  For AArch64 we wrote a tiny simulator and lined it in to the
HotSpot runtime so that everything except the JIT-generated code ran
as native optimized x86-64 code.  That helped a lot: if you had to run
the entire JVM in emulation you'd die waiting for it to get as far as
generating the interpreter.

Andrew Haley
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
EAC8 43EB D3EF DB98 CC77 2FAD A5CD 6035 332F A671

More information about the discuss mailing list