openjdk6-mips port added to icedtea server

[LIU Qi]

 >   Hi,
Hi Paulo,
 > 
 >   Sorry for hijacking the thread, but I started recently adding
 > support for mips in my fork of the lightning jit generator, at
 > 
 > http://github.com/pcpa/lightning
 > 
 > This is done as a personal project (no companies of official
 > projects involved, I use lightning for jit in a language I am
 > writing...), as I have access to an older gdium sample; I also
 > wrote a very good share of the Xorg siliconmotion driver for
 > smi 501/502 like 2 years ago, also for the gdium.
That sounds interesting, and thank you for your contribution to the
Loongson and gdium.

 > 
 >   Any pointers on these would be useful:
 > o How to pass float and double arguments so that they would work
 >   if calling a prototyped or not prototyped function; floats are
 >   ok if working only with prototyped functions
 >   My current guess, before working on it again, and writing some
 >   basic tests with gcc calling a jit function and then inspecting
 >   registers is that:
 >   a0+a1 first double
 >   a2+a3 second double
 >   f12 first float
 >   f13 second float
 >   f14 third float
 >   f15 fourth float
What you cared about is defined in the ABI. There are three common ABIs
used for MIPS architectures, o32, n32 and n64. You could get the
information in the manual of these ABIs. Also, they are mentioned in the
book 'See MIPS run'.
 > o Pointers to download of images (for godson/loongson) of a system
 >   with gcc and binutils devel, running either 64 bits mode, big endian
 >   mode or another abi are also welcome, so that I can test all
 >   alternatives before considering it done
You could use the Debian mipsel system for the development. Loongson
support only little endian.

 > o How to detect cpu features, preferably without causing signals/traps,
 >   because I use attribute constructor on a function, but currently
 >   only functional for x86. What is desirable to detect is if, or which
 >   mips32 release 2 opcodes are implemented, or which mips32 opcodes
 >   are missing (in the mips manual, it says movf and movt are mips32
 >   but are not implemented in my sample for example)
You could read the CPU information from /proc/cpuinfo. And Loongson2F
is compatible with MIPS3. The Loongson2G and Loongson3 will be MIPS64
compatible.

 > o This one is kinda funny, as I am working on generating code, I am
 >   still not very familiar with the actual assembler syntax, so,
 >   what would be the proper __asm__ __volatile__ to flush the code
 >   cache of a buffer recently written? (I am making a call to _cache_flush
 >   on linux, and just mprotect otherwise, but it may require a different
 >   approach on other system).
There is a system call named cacheflush(147) could be used to flush the
cache. In some systems, cache could be flushed only with the privilege,
so using assemble in use space may not be a good idea to do this.


Regards,
Qi

-- 
 LIU Qi

 liuqi at loongson.cn
 liuqi82 at gmail.com

 Loongson Technology Co. Ltd.

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