openjdk6-mips port added to icedtea server

Paulo César Pereira de Andrade pcpa at
Sun Oct 24 03:04:13 PDT 2010

LIU Qi wrote:
>  >   Hi,
> Hi Paulo,

  Hi LIU,

>  >   Any pointers on these would be useful:
>  > o How to pass float and double arguments so that they would work
>  >   if calling a prototyped or not prototyped function; floats are
>  >   ok if working only with prototyped functions
>  >   My current guess, before working on it again, and writing some
>  >   basic tests with gcc calling a jit function and then inspecting
>  >   registers is that:
>  >   a0+a1 first double
>  >   a2+a3 second double
>  >   f12 first float
>  >   f13 second float
>  >   f14 third float
>  >   f15 fourth float
> What you cared about is defined in the ABI. There are three common ABIs
> used for MIPS architectures, o32, n32 and n64. You could get the
> information in the manual of these ABIs. Also, they are mentioned in the
> book 'See MIPS run'.

  Thanks. I think now I understand what was causing me confusion,
and is the rule that if first argument is float other(s) also go on
float register(s), otherwise register arguments go on int registers.

>  > o Pointers to download of images (for godson/loongson) of a system
>  >   with gcc and binutils devel, running either 64 bits mode, big endian
>  >   mode or another abi are also welcome, so that I can test all
>  >   alternatives before considering it done
> You could use the Debian mipsel system for the development. Loongson
> support only little endian.

  Ok. I will check it, as I am mostly interested on a 64 bits system.
For 32 bits I am using the Mandriva port.

>  > o How to detect cpu features, preferably without causing signals/traps,
>  >   because I use attribute constructor on a function, but currently
>  >   only functional for x86. What is desirable to detect is if, or which
>  >   mips32 release 2 opcodes are implemented, or which mips32 opcodes
>  >   are missing (in the mips manual, it says movf and movt are mips32
>  >   but are not implemented in my sample for example)
> You could read the CPU information from /proc/cpuinfo. And Loongson2F
> is compatible with MIPS3. The Loongson2G and Loongson3 will be MIPS64
> compatible.

  I do not have access to the sample right now, but I think it is
still code named Godson; probably one of the first processors
available. But it should be ok to read /proc/cpuinfo and for other
OSes just default to a common denominator.

>  > o This one is kinda funny, as I am working on generating code, I am
>  >   still not very familiar with the actual assembler syntax, so,
>  >   what would be the proper __asm__ __volatile__ to flush the code
>  >   cache of a buffer recently written? (I am making a call to
> _cache_flush
>  >   on linux, and just mprotect otherwise, but it may require a different
>  >   approach on other system).
> There is a system call named cacheflush(147) could be used to flush the
> cache. In some systems, cache could be flushed only with the privilege,
> so using assemble in use space may not be a good idea to do this.

  I was more interested in attempting to give less work in case someone
works on it for other OS. The current code in
was mostly a quick hack, and the assembly should be more like:
  cache 16,0($a0); cache 16,0($a1)
what should invalidate instruction cache at start and end of jit buffer.
But probably I will just remove the #if 0'ed code, as this should really
be done by the kernel.

Thanks again,

> Regards,
> Qi
> --
>  LIU Qi
>  liuqi at
>  liuqi82 at
>  Loongson Technology Co. Ltd.
>  PGP Key fingerprint:
>   3D29 FDFD AFB3 225D B744
>   7FAB 51C7 4820 63BA 272F

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