Request for review (L): 6797305: Add LoadUB and LoadUI opcode class

[Tom Rodriguez]

On Mar 2, 2009, at 9:31 AM, Christian Thalinger wrote:

> On Fri, 2009-02-27 at 22:34 +0100, Christian Thalinger wrote:
>> On Fri, 2009-02-27 at 10:06 -0800, Tom Rodriguez wrote:
>>> Basically you have to distinguish the two modes by hand.  Check out
>>> the loadN instruct definition.
>>
>> Okay, I will have a look at it.
>
> Oops, I almost forgot to look at that.  Adding that check to all other
> cases sounds not like a good idea.  Two questions/solutions:

It is a little unsatisfying.  Using the MacroAssembler on intel seems  
a little more important to me since the encodings are so complex and  
are easy to get wrong.

> 1. Can normal loads and stores be indexed?

Sparc only has reg,reg and reg/simm13 addressing modes and C2 will use  
whichever is appropriate.

> 2. What about adding load and store assembler instruction like on x86
> with an Address argument, e.g.
>
>  inline void lduw(Address a, Register d);

We could, though fixing that along with what you are doing seems like  
loading more than want into your change.  I'd leave the sparc  
encodings along for now and we can fix it later to support the Address  
stuff.

> The
>
>  inline void lduw(const Address& a, Register d, int offset = 0);
>
> seems to be doing something different, although I don't know yet what.

I've never understood what the Address variants do in the sparc  
assembler.  They're very strange.  Any change to use Address more  
normally would require changing those too I think.

tom

>
>
> -- Christian
>