SIMD auto-vectorization in hotspot

Vladimir Kozlov vladimir.kozlov at oracle.com
Tue Jan 17 00:52:23 PST 2012


Vector arithmetic are not generated yet (we have plan to do it). Only array initialization and array copy is done. I 
recently added AVX support to generated 3-operands instructions but only scalar one.

Vladimir

On 1/16/12 11:03 PM, Vitaly Davidovich wrote:
> Thanks Kris, I'll take a look.  I should've been clearer in my question though -- I'm mostly interested in packed math
> (integer and floating point).
>
> Cheers
>
> On Tue, Jan 17, 2012 at 1:36 AM, Krystal Mok <rednaxelafx at gmail.com <mailto:rednaxelafx at gmail.com>> wrote:
>
>     Hi,
>
>     Apparently, the source code to read is opto/superword.[hpp|cpp] [1][2]. The flag to trace it is -XX:+TraceSuperWord.
>     There's a paper mentioned in [1], which is the origin of the algorithm used.
>
>     An example to see superword in action is a simple array copy loop:
>
>     // byte[] src = ...
>     // byte[] dest = ...
>     // assert(src.length == dest.length)
>     for (int i = 0; i < src.length; i++) {
>        dest[i] = src[i];
>     }
>
>     This loop will be vectorized by superword and then unrolled a bit, turning the actual copy into something like: (on
>     32-bit x86)
>
>     movq   0xc(%ecx,%edi,4),%xmm0
>     movq   %xmm0,0xc(%edx,%edi,4)
>
>     HTH,
>     - Kris
>
>     [1]: http://hg.openjdk.java.net/hsx/hotspot-main/hotspot/file/tip/src/share/vm/opto/superword.hpp
>     [2]: http://hg.openjdk.java.net/hsx/hotspot-main/hotspot/file/tip/src/share/vm/opto/superword.cpp
>     <http://hg.openjdk.java.net/hsx/hotspot-main/hotspot/file/tip/src/share/vm/opto/superword.hpp>
>
>
>     On Tue, Jan 17, 2012 at 1:45 PM, Vitaly Davidovich <vitalyd at gmail.com <mailto:vitalyd at gmail.com>> wrote:
>
>         Hi guys,
>
>         Does the -XX:+UseSuperWord (I see it's set to true on 6u23) optimization enable auto-vectorization of certain
>         loops? If so, are there any switches that can be turned on (in product VM) to see if vectorization is being
>         applied or not? In general, would someone be able to describe the current state of loop vectorization (i.e.
>         implementation limits, restrictions, etc)? Which ISAs are supported (i.e. SSE, AVX)? Any other info on this
>         subject would be greatly appreciated ...
>
>         Thanks very much,
>
>         Vitaly
>
>
>
>
>
> --
> Vitaly
> 617-548-7007 (mobile)


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