[aarch64-port-dev ] RFR: AArch64: incorrect code generation for StoreCM

[aph]

On 07/03/2018 09:57 AM, Andrew Dinn wrote:
> The correct generated sequences should be
> 
>   str ; dmb ishst ; strb
> 
> and
> 
>   dmb ish ; stlr; dmb ishst ; strb ; dmb ish

What is the leading  DMB ISH  supposed to do here?  The STRB can't move and
the STLR is enough for a volatile store.

Andrew.