[aarch64-port-dev ] RFR: AArch64: incorrect code generation for StoreCM

[Monica Beckwith]

Thank you Zhongwei and Andrew for catching and correcting the volatile write + CMS wo conditional card mark case. At Arm, we have tools that can help design and test such cases for our memory model (See http://www0.cs.ucl.ac.uk/staff/J.Alglave/papers/toplas14.pdf ). The tool correctly caught the case where STLR by itself didn't provide the desired order. So, we would need:

STLR (guarantees observance of load/stores preceding (in PO) this instruction)
DMB ST (Guarantees store order before and after)
STR

Thank you both for correcting this just in time :D.

Regards,
Monica

On 7/4/18, 7:18 AM, "aarch64-port-dev on behalf of Andrew Dinn" <aarch64-port-dev-bounces at openjdk.java.net on behalf of adinn at redhat.com> wrote:

    On 04/07/18 10:55, Zhongwei Yao wrote:
    > It looks good to me.

    Thanks Zhongwei. I will list you as a reviewer in the patch.

    I'm still waiting for an ack from Andrew Haley. Unfortunately, he is
    away today so a push will be delayed until tomorrow at the earliest.

    >>> I'm thinking whether it is OK to replace "stlr; dmb ishst; strb" with
    >>> "stlr; strlb" when we using CMS without conditional card marking.
    >>> What do you think?
    >>
    >> Yes, that does look better. However, I would prefer to implement that as
    >> a separate fix if that is ok. I'd like to have a correct version checked
    >> in before we try to implement an optimized version.
    >>
    > Yeah, agree.
    I looked at this and it should be fairly easy to do, The only tricky
    thing is ensuring that the memory operand to the StoreCM rules does not
    use an index register, displacement or offset -- releasing store
    addressing modes are more restricted than normal stores so the rule
    needs an indirect type for the mem operand rather than a generic memory
    type.

    regards,


    Andrew Dinn
    -----------
    Senior Principal Software Engineer
    Red Hat UK Ltd
    Registered in England and Wales under Company Registration No. 03798903
    Directors: Michael Cunningham, Michael ("Mike") O'Neill, Eric Shander


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