[aarch64-port-dev ] RFR(S): 8204353 - AARCH64: optimize FPU load and stores in macroAssembler

[Andrew Haley]

On 06/06/2018 08:59 AM, Andrew Haley wrote:
> On 06/05/2018 08:46 PM, Dmitrij Pochepko wrote:
>> webrev: http://cr.openjdk.java.net/~dpochepk/8204353/webrev.01/
> 
> OK, seems reasonable.

Hold on, no.  I replied too quickly.

2572 void MacroAssembler::push_call_clobbered_registers() {
2573   int step = 4 * wordSize;
2574   push(RegSet::range(r0, r18) - RegSet::of(rscratch1, rscratch2), sp);
2575   sub(sp, sp, step);
2576   mov(rscratch1, -step);
2577   // Push v0-v7, v16-v31.
2578   for (int i = 31; i>= 4; i -= 4) {
2579     if (i <= v7->encoding() || i >= v16->encoding())
2580       st1(as_FloatRegister(i-3), as_FloatRegister(i-2), as_FloatRegister(i-1),
2581           as_FloatRegister(i), T1D, Address(sp, rscratch1));

2582   }
2583   st1(as_FloatRegister(0), as_FloatRegister(1), as_FloatRegister(2),
2584       as_FloatRegister(3), T1D, Address(sp));
2585 }

What is "step" in rscratch1 used for here?  Where do we push the registers?

-- 
Andrew Haley
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
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