RFR: 8216392: Enable cmovP_mem and cmovP_memU instructions

[Andrew Haley]

On 1/15/19 10:17 AM, Roman Kennke wrote:
> I agree with that. However, note that this is not about using cmov vs.
> branches. This is about generating a load followed by a cmov on the
> resulting register vs generating a cmov that also does the load and
> avoids the register. It's pretty much the same data-dependency-wise,
> except that it avoids using the extra register and encodes smaller.

Sure, I get that. But, for the reasons given, CMOV is a rather dusty
corner of the ISA. Intel themselves recommend not using it unless you
know that the branch is always unpredictable. They say "Use the SETCC
and CMOV instructions to eliminate unpredictable conditional branches
where possible. Do not do this for predictable branches." It really
couldn't be clearer.

-- 
Andrew Haley
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
EAC8 43EB D3EF DB98 CC77 2FAD A5CD 6035 332F A671