RFR: 8216392: Enable cmovP_mem and cmovP_memU instructions

[Andrew Haley]

On 1/16/19 8:46 PM, B. Blaser wrote:

> To answer Andrew Haley, one of the major difference between CISC and
> RISC is specifically the load/store architecture of the latter which
> is part of most instructions of the former; I don't see many good
> reasons to generate RISC-like load/store code using only a subset of
> instructions and to juggle with registers.

Well, yes, but the question remains: does this change actually help
anything. And if it does, by how much? All we have now is

> I cannot say if if this has performance implication. I suspect
> not. If it has, it's probably miniscule improvement. I can't see how
> it could be worse though.

We can measure, and we should.

-- 
Andrew Haley
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
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