RFR(S): 8230591: AArch64: Missing intrinsics for Math.ceil, floor, rint

[Andrew Haley]

hi,

On 1/10/20 3:34 AM, Pengfei Li wrote:

>> These instructions fall into the category "AdvSIMD two-reg misc". Please put
>> them there. Otherwise OK, thanks.
>
> Some of these rounding instructions do not perfectly match category
> "AdvSIMD two-reg misc". In that category, we use "f((int)(T >> 1),
> 23, 22)" where the SIMD_Arrangement T is "100", "101" or "111" for
> "T2S", "T4S" or "T2D" respectively. In this case, the 23rd bit is
> always set to 1. But for some rounding instructions (FRINTN/FRINTM),
> the 23rd bit should be 0.

Sure, but the code in "AdvSIMD two-reg misc" can easily be made
flexible enough to accommodate that. All you have to do aas far as I
can see is make size a parameter: everything else is the same.

> Moreover, I don't think instructions FSQRT/FABS/FNEG should be put
> into that category as their 23rd bit is not actually derived from
> the data type (or we say the SIMD_Arrangement T), although there's
> no error since those bits happen to be 1.
>
> So for better instruction categories, I would like to add a new
> category (perhaps named "AdvSIMD two-reg arithmetic") and put
> rounding instructions as well as FSQRT/FABS/FNEG into this. I will
> upload a new webrev if you agree with me.

The grouping names are defined by the ARM reference manual, they are
not something we should invent for ourselves. If you go to the RM, see
"Advanced SIMD two-register miscellaneous"; the encodings are all
defined in terms of U, size, and opcode.

The important thing is that our assembler should follow the layout and
classification in that manual as closely as we possibly can.

-- 
Andrew Haley  (he/him)
Java Platform Lead Engineer
Red Hat UK Ltd. <https://www.redhat.com>
https://keybase.io/andrewhaley
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