RFR: 8255438: [Vector API] More instructs in x86.ad should use legacy mode for code-gen [v2]

[Jie Fu]

On Wed, 28 Oct 2020 07:17:23 GMT, Vladimir Ivanov <vlivanov at openjdk.org> wrote:

> From correctness perspective, the fix looks good.
> Xeon Phi CPU family doesn't support BW/DQ extensions.
> 
> The only concern I have is that the fix completely disables the usage of the upper bank (16-31) registers for those operands irrespective of whether BW/DQ are present or not. It may lead to performance problems when vector register pressure is high.

Thanks @iwanowww for your review.

reductionL_avx512dq and reductionB_avx512bw have been added for your concerns.
Any comments?
Thanks.

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PR: https://git.openjdk.java.net/jdk/pull/874