RFR: 8276108: Wrong instruction generation in aarch64 backend [v2]

Patric Hedlin phedlin at openjdk.java.net
Wed Nov 24 11:52:45 UTC 2021


> C1 code generation on AArch64 may produce bad LDR/STR immediate offset instructions when the actual operand (datum) size is unknown. This change will alter the code generated for the problematic immediate offset to use the register offset version (requiring additional instructions).
> 
> Contributed by Nick Gasson.
> 
> Added assert in Address::encode() to emphasise the use of a valid immediate (in base_plus_offset).
> 
> Added clarifying comment to Address::offset_ok_for_immed() emphasising favouring of the scaled unsigned 12-bit encoding for aligned offsets.

Patric Hedlin has updated the pull request incrementally with one additional commit since the last revision:

  Clean-up address calculation via use of legitimize_address().

-------------

Changes:
  - all: https://git.openjdk.java.net/jdk/pull/6212/files
  - new: https://git.openjdk.java.net/jdk/pull/6212/files/44d78779..4c48b421

Webrevs:
 - full: https://webrevs.openjdk.java.net/?repo=jdk&pr=6212&range=01
 - incr: https://webrevs.openjdk.java.net/?repo=jdk&pr=6212&range=00-01

  Stats: 7 lines in 1 file changed: 0 ins; 6 del; 1 mod
  Patch: https://git.openjdk.java.net/jdk/pull/6212.diff
  Fetch: git fetch https://git.openjdk.java.net/jdk pull/6212/head:pull/6212

PR: https://git.openjdk.java.net/jdk/pull/6212


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