RFR: 8283307: Vectorize unsigned shift right on signed subword types
Jie Fu
jiefu at openjdk.java.net
Fri Apr 15 02:36:41 UTC 2022
On Fri, 15 Apr 2022 02:12:33 GMT, Fei Gao <fgao at openjdk.org> wrote:
> I notice that the file checks some vector nodes like `LOAD_VECTOR` but there is no requirement on machine
>
> https://github.com/openjdk/jdk/blob/d41331e6f2255aa07dbbbbccf62e39c50269e269/test/hotspot/jtreg/compiler/c2/irTests/TestAutoVectorization2DArray.java#L32
>
> . May I ask why? I suppose that not all machines support simd and the check for vector node may fail, right? I can't enable GHA because of some unknown limitation on my account. I fear that fixing it here may break GHA. Thanks.
LoadV/StoreV/AddV are basic and common operations which are supported by modern CPUs.
The test should be run on both x86 and aarch64 if you are not sure whether other CPUs support RShiftV.
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PR: https://git.openjdk.java.net/jdk/pull/7979
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