RFR: 8283307: Vectorize unsigned shift right on signed subword types [v2]

Wed Apr 20 01:31:24 UTC 2022

On Fri, 15 Apr 2022 02:33:34 GMT, Jie Fu <jiefu at openjdk.org> wrote:

>> I notice that the file checks some vector nodes like `LOAD_VECTOR` but there is no requirement on machine https://github.com/openjdk/jdk/blob/d41331e6f2255aa07dbbbbccf62e39c50269e269/test/hotspot/jtreg/compiler/c2/irTests/TestAutoVectorization2DArray.java#L32. May I ask why? I suppose that not all machines support simd and the check for vector node may fail, right? I can't enable GHA because of some unknown limitation on my account. I fear that fixing it here may break GHA. Thanks.
>
>> I notice that the file checks some vector nodes like `LOAD_VECTOR` but there is no requirement on machine
>> 
>> https://github.com/openjdk/jdk/blob/d41331e6f2255aa07dbbbbccf62e39c50269e269/test/hotspot/jtreg/compiler/c2/irTests/TestAutoVectorization2DArray.java#L32
>> 
>> . May I ask why? I suppose that not all machines support simd and the check for vector node may fail, right? I can't enable GHA because of some unknown limitation on my account. I fear that fixing it here may break GHA. Thanks.
> 
> LoadV/StoreV/AddV are basic and common operations which are supported by modern CPUs.
> The test should be run on both x86 and aarch64 if you are not sure whether other CPUs support RShiftV.

> This `requires` would disable the test on some x86 machines. So we'd better fix it.

Done. Thanks.

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PR: https://git.openjdk.java.net/jdk/pull/7979