RFR: 8321215: Incorrect x86 instruction encoding for VSIB addressing mode

[Sandhya Viswanathan]

For instructions that use VSIB addressing mode (gather/scatter), the assembler incorrectly sets EVEX.X bit when the VSIB vector register is in the range XMM16 - XMM23. The EVEX.X bit should only be set when bit 3 of the register encoding is 1,  i.e. if the register encoding is 8 - 15 or 24 - 31.

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Commit messages:
 - 8321215: Incorrect x86 instruction encoding for VSIB addressing mode

Changes: https://git.openjdk.org/jdk/pull/16957/files
 Webrev: https://webrevs.openjdk.org/?repo=jdk&pr=16957&range=00
  Issue: https://bugs.openjdk.org/browse/JDK-8321215
  Stats: 1 line in 1 file changed: 0 ins; 0 del; 1 mod
  Patch: https://git.openjdk.org/jdk/pull/16957.diff
  Fetch: git fetch https://git.openjdk.org/jdk.git pull/16957/head:pull/16957

PR: https://git.openjdk.org/jdk/pull/16957